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Commit Graph

10 Commits

Author SHA1 Message Date
Alexey Samsonov
5f63d4f83d Let llvm::ReplaceInstWithInst copy debug location from old to new instruction.
Currently some users of this function do this explicitly, and all the
rest forget to do this.

ThreadSanitizer was one of such users, and had missing debug
locations for calls into TSan runtime handling atomic operations,
eventually leading to poorly symbolized stack traces and malfunctioning
suppressions.

This is another change relevant to PR23837.

llvm-svn: 240460
2015-06-23 21:00:08 +00:00
David Blaikie
ab043ff680 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
2015-02-27 21:17:42 +00:00
Tim Northover
68c567a38a IR: add a second ordering operand to cmpxhg for failure
The syntax for "cmpxchg" should now look something like:

	cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic

where the second ordering argument gives the required semantics in the case
that no exchange takes place. It should be no stronger than the first ordering
constraint and cannot be either "release" or "acq_rel" (since no store will
have taken place).

rdar://problem/15996804

llvm-svn: 203559
2014-03-11 10:48:52 +00:00
Dmitry Vyukov
8fc35c7216 tsan: instrument atomic nand operation
llvm-svn: 168684
2012-11-27 08:09:25 +00:00
Dmitry Vyukov
2284d1c705 [tsan] add fail order to compare_exchange
llvm-svn: 168586
2012-11-26 11:36:19 +00:00
Dmitry Vyukov
fab21a5c47 tsan: switch to new memory_order constants (ABI compatible)
llvm-svn: 167615
2012-11-09 14:12:16 +00:00
Dmitry Vyukov
62df6da6a6 tsan: instrument all atomics (including fetch_add, exchange, cas, etc)
llvm-svn: 167612
2012-11-09 12:55:36 +00:00
Dmitry Vyukov
f931f3a4d1 tsan: update the test for new atomic enums
llvm-svn: 165109
2012-10-03 13:19:20 +00:00
Dmitry Vyukov
52c2c1cd4f tsan: update the test for new atomic enums
llvm-svn: 165108
2012-10-03 13:13:54 +00:00
Kostya Serebryany
0cd695bd39 [tsan] Atomic support for ThreadSanitizer, patch by Dmitry Vyukov
llvm-svn: 155698
2012-04-27 07:31:53 +00:00