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Commit Graph

23 Commits

Author SHA1 Message Date
Dan Gohman
d7a32ecde2 Trim unnecessary #includes.
llvm-svn: 53471
2008-07-11 20:38:31 +00:00
Dan Gohman
c8097f8c8c Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943
2008-07-01 00:05:16 +00:00
Dan Gohman
e9f33e576d Don't use ISD namespace opcodes for MachineInstrs.
llvm-svn: 52932
2008-06-30 22:23:08 +00:00
Bill Wendling
2ba98ca60f Remove more iostream header includes. Needed to implement a "FlushStream"
function to flush a specified std::ostream.

llvm-svn: 51705
2008-05-29 21:46:33 +00:00
Evan Cheng
38a755499d Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Anton Korobeynikov
c41f5b6af4 Fix newly-introduced 4.3 warnings
llvm-svn: 47375
2008-02-20 12:07:57 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Evan Cheng
705212577d Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
llvm-svn: 46609
2008-01-31 09:59:15 +00:00
Scott Michel
ab3702fba9 More cleanups for CellSPU:
- Expand tabs... (poss 80-col violations, will get them later...)
- Consolidate logic for SelectDFormAddr and SelectDForm2Addr into a single
  function, simplifying maintenance. Also reduced custom instruction
  generation for SPUvecinsert/INSERT_MASK.

llvm-svn: 46544
2008-01-30 02:55:46 +00:00
Owen Anderson
f19692b2f6 Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...

llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo.
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Owen Anderson
ae7e2c1e03 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Scott Michel
5cbdbd26a8 More working CellSPU tests:
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads

llvm-svn: 45242
2007-12-20 00:44:13 +00:00
Scott Michel
d4d96bb6f6 Add new immed16.ll test case, fix CellSPU errata to make test case work.
llvm-svn: 45196
2007-12-19 07:35:06 +00:00
Scott Michel
4f980e1acd - Restore some i8 functionality in CellSPU
- New test case: nand.ll

llvm-svn: 45130
2007-12-17 22:32:34 +00:00
Evan Cheng
aecb76bcc2 Update foldMemoryOperand.
llvm-svn: 44621
2007-12-05 18:36:37 +00:00
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
the stored register is killed.

llvm-svn: 44600
2007-12-05 03:14:33 +00:00
Scott Michel
8a2cb11b05 Updated source file headers to llvm coding standard.
llvm-svn: 44597
2007-12-05 01:40:25 +00:00
Scott Michel
191775d31f Main CellSPU backend files checked in. Intrinsics and autoconf files
remain.

llvm-svn: 44595
2007-12-05 01:24:05 +00:00