1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00
Commit Graph

67004 Commits

Author SHA1 Message Date
Robert Lytton
604b5e52e1 XCore target: fix const section handling
Xcore target ABI requires const data that is externally visible
to be handled differently if it has C-language linkage rather than
C++ language linkage.

Clang now emits ".cp.rodata" section information.

All other externally visible constant data will be placed in the DP section.

llvm-svn: 201144
2014-02-11 10:36:26 +00:00
Robert Lytton
6ac9a5d013 XCore target: Lower ATOMIC_LOAD & ATOMIC_STORE
llvm-svn: 201143
2014-02-11 10:36:18 +00:00
Elena Demikhovsky
31d965117b AVX: fixed a bug in LowerVECTOR_SHUFFLE
llvm-svn: 201140
2014-02-11 10:21:53 +00:00
Dmitri Gribenko
1540932063 Remove TimeValue::toPosixTime() -- it is buggy, semantics are unclear, and its
only current user should be using toEpochTime() instead.

llvm-svn: 201136
2014-02-11 09:11:18 +00:00
Elena Demikhovsky
ac4dfca982 AVX-512: Optimized BUILD_VECTOR pattern;
fixed encoding of VEXTRACTPS instruction.

llvm-svn: 201134
2014-02-11 07:25:59 +00:00
Lang Hames
7c5d1c1399 In RuntimeDyldImpl::emitSection, make Allocate (section size to be allocated) a
uintptr_t. An unsigned could overflow for large sections.

No test case - anything big enough to overflow an unsigned is going to take an
appreciable time to zero when the test passes.

The choice of uintptr_t was made to match the RTDyldMemoryManager APIs, but
these should probably be hardcoded to uint64_ts: It is legitimate to JIT for
64-bit targets from a 32-bit host/compiler.

llvm-svn: 201127
2014-02-11 05:28:24 +00:00
Aaron Ballman
142f8478ea Using the helper API for random number generation.
llvm-svn: 201125
2014-02-11 03:40:14 +00:00
Aaron Ballman
7ffd0ae2d9 Hopefully fixing the MinGW 32 build, which was broken by r200767. Not using rand_s() since MinGW does not have an implementation for it, but instead using the underlying CryptGenRandom APIs.
llvm-svn: 201124
2014-02-11 02:47:33 +00:00
Quentin Colombet
826c5ca154 [CodeGenPrepare] Undo changes that happened for the profitability check.
The addressing mode matcher checks at some point the profitability of folding an
instruction into the addressing mode. When the instruction to be folded has
several uses, it checks that the instruction can be folded in each use.
To do so, it creates a new matcher for each use and check if the instruction is
in the list of the matched instructions of this new matcher.

The new matchers may promote some instructions and this has to be undone to keep
the state of the original matcher consistent.

A test case will follow.

<rdar://problem/16020230>

llvm-svn: 201121
2014-02-11 01:59:02 +00:00
David Blaikie
d038af5edb DebugInfo: Use existing symbol rather than creating it again.
llvm-svn: 201119
2014-02-11 01:23:52 +00:00
Juergen Ributzka
417eaefc76 [Stackmaps] Cleanup code. No functional change intended.
llvm-svn: 201115
2014-02-10 23:30:26 +00:00
Manman Ren
5a1cf3b255 LTO API: add lto_module_create_from_memory_with_path.
This function adds an extra path argument to lto_module_create_from_memory.
The path argument will be passed to makeBuffer to make sure the MemoryBuffer
has a name and the created module has a module identifier.

This is mainly for emitting warning messages from the linker. When we emit
warning message on a module, we can use the module identifier.

rdar://15985737

llvm-svn: 201114
2014-02-10 23:26:14 +00:00
Rafael Espindola
748adb64c7 Mark the methods in the Mangler const.
A const ObjectFile needs to be able to provide its name. For an IRObjectFile,
that means being able to call the mangler. Since each IRObjectFile can have
a different mangling, it is natural for them to contain a Mangler which is
therefore also const.

llvm-svn: 201113
2014-02-10 21:25:13 +00:00
Rafael Espindola
4abddc0b33 Change the begin and end methods in ObjectFile to match the style guide.
llvm-svn: 201108
2014-02-10 20:24:04 +00:00
Matt Arsenault
38609a2ae1 R600: Implement isTruncateFree
Truncation is just accessing a subregister for any multiple of
the register size, so it's free.

llvm-svn: 201107
2014-02-10 19:57:42 +00:00
Chandler Carruth
90e016d8fc [LPM] A terribly simple fix to a terribly complex bug: PR18773.
The crux of the issue is that LCSSA doesn't preserve stateful alias
analyses. Before r200067, LICM didn't cause LCSSA to run in the LTO pass
manager, where LICM runs essentially without any of the other loop
passes. As a consequence the globalmodref-aa pass run before that loop
pass manager was able to survive the loop pass manager and be used by
DSE to eliminate stores in the function called from the loop body in
Adobe-C++/loop_unroll (and similar patterns in other benchmarks).

When LICM was taught to preserve LCSSA it had to require it as well.
This caused it to be run in the loop pass manager and because it did not
preserve AA, the stateful AA was lost. Most of LLVM's AA isn't stateful
and so this didn't manifest in most cases. Also, in most cases LCSSA was
already running, and so there was no interesting change.

The real kicker is that LCSSA by its definition (injecting PHI nodes
only) trivially preserves AA! All we need to do is mark it, and then
everything goes back to working as intended. It probably was blocking
some other weird cases of stateful AA but the only one I have is
a 1000-line IR test case from loop_unroll, so I don't really have a good
test case here.

Hopefully this fixes the regressions on performance that have been seen
since that revision.

llvm-svn: 201104
2014-02-10 19:39:35 +00:00
Hans Wennborg
accee81d94 Copy the ThreadLocalMode in GlobalVariable::copyAttributesFrom
This fixes the oversight from r159077.

llvm-svn: 201098
2014-02-10 17:13:56 +00:00
Tom Stellard
2712f90019 R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are used
DS instructions that access local memory can only uses addresses that
are less than or equal to the value of M0.  When M0 is uninitialized,
then we experience undefined behavior.

This patch also changes the behavior to emit S_WQM_B64 on pixel shaders
no matter what kind of DS instruction is used.

llvm-svn: 201097
2014-02-10 16:58:30 +00:00
Tom Stellard
de54e7d923 R600/SI: Only use S_WQM_B64 in pixel shaders
This doesn't change any functionality, since we only have two shader
types (compute and pixel) that use local memory.  We're just changing
the logic to match the documentation.

llvm-svn: 201096
2014-02-10 16:58:27 +00:00
David Blaikie
f4af3ccb4b Remove some prototype code accidentally committed in r201043
Thanks to Chandler for the catch.

llvm-svn: 201095
2014-02-10 16:49:07 +00:00
Tim Northover
68738948e7 ARM: use natural LLVM IR for vshll instructions
Similarly to the vshrn instructions, these are simple zext/sext + trunc
operations. Using normal LLVM IR should allow for better code, and more sharing
with the AArch64 backend.

llvm-svn: 201093
2014-02-10 16:20:29 +00:00
Chad Rosier
a434e7ab2c [AArch64] Handle aliases of conditional branches without b.pred form.
llvm-svn: 201091
2014-02-10 15:43:11 +00:00
Oliver Stannard
d01574e188 ARM: r12 is callee-saved for interrupt handlers
For A- and R-class processors, r12 is not normally callee-saved, but is for
interrupt handlers. See AAPCS, 5.3.1.1, "Use of IP by the linker".

llvm-svn: 201089
2014-02-10 14:24:23 +00:00
Benjamin Kramer
4779ebf069 Make succ_iterator a real random access iterator and clean up a couple of users.
llvm-svn: 201088
2014-02-10 14:17:42 +00:00
Benjamin Kramer
6f5190be6c GlobalsModRef: Unify and clean up duplicated pointer analysis code.
llvm-svn: 201087
2014-02-10 14:17:30 +00:00
Tim Northover
f94bdee15e ARM: use LLVM IR to represent the vshrn operation
vshrn is just the combination of a right shift and a truncate (and the limits
on the immediate value actually mean the signedness of the shift doesn't
matter). Using that representation allows us to get rid of an ARM-specific
intrinsic, share more code with AArch64 and hopefully get better code out of
the mid-end optimisers.

llvm-svn: 201085
2014-02-10 14:04:07 +00:00
Matheus Almeida
a37a49cc06 [mips][msa] Add DLSA instruction.
llvm-svn: 201081
2014-02-10 12:05:17 +00:00
Matheus Almeida
c2e8b799cf [mips][msa] Make LSA_DESC a parameterizable class.
This way it's possible to share the instruction's description for LSA and
DLSA (to be added).

No functional changes.

llvm-svn: 201078
2014-02-10 11:15:37 +00:00
NAKAMURA Takumi
ad172d26af [CMake] LLVMSupport should be responsible to provide system_libs.
llvm-svn: 201077
2014-02-10 10:52:19 +00:00
Kostya Serebryany
668ea393ac [asan] support for FreeBSD, LLVM part. patch by Viktor Kutuzov
llvm-svn: 201067
2014-02-10 07:37:04 +00:00
Elena Demikhovsky
110d93ce93 AVX-512: Fixed extract_vector_elt for v16i1 and v8i1 vectors.
llvm-svn: 201066
2014-02-10 07:02:39 +00:00
Craig Topper
5f3cd9c3a9 Recommit r201059 and r201060 with hopefully a fix for its original failure.
Original commits messages:

Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.

Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information.

llvm-svn: 201065
2014-02-10 06:55:41 +00:00
Bob Wilson
3e54e44d03 Revert r201059 and r201060.
r201059 appears to cause a crash in a bootstrapped build of clang. Craig
isn't available to look at it right now, so I'm reverting it while he
investigates.

llvm-svn: 201064
2014-02-10 05:28:30 +00:00
Hao Liu
636db9c0e6 [AArch64]Implement the copy of two FPR8 registers by using FMOVss of two FPR32 registers in copyPhysReg.
llvm-svn: 201061
2014-02-10 03:16:22 +00:00
Craig Topper
c4ecc4bda5 Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.
llvm-svn: 201059
2014-02-10 00:50:34 +00:00
Saleem Abdulrasool
360c5ac6fd MCParser: add a single token lookahead
Some of the more complex directive and macro handling for GAS compatibility
requires lookahead.  Add a single token lookahead in the MCAsmLexer.

llvm-svn: 201058
2014-02-09 23:29:24 +00:00
Benjamin Kramer
b8be18dbcc AsmParser: Simplify code with ArrayRef.
No functionality change.

llvm-svn: 201055
2014-02-09 17:13:11 +00:00
Benjamin Kramer
dd9c671cdc AsmParser: Parse (and ignore) nested .macro definitions.
This enables a slightly odd feature of gas. The macro is defined when
the outermost macro is instantiated.

PR18599

llvm-svn: 201045
2014-02-09 16:22:00 +00:00
Rafael Espindola
8815574a16 Use a consistent argument order in TargetLoweringObjectFile.
These methods normally call each other and it is really annoying if the
arguments are in different order. The more common rule was that the arguments
specific to call are first (GV, Encoding, Suffix) and the auxiliary objects
(Mang, TM) come after. This patch changes the exceptions.

llvm-svn: 201044
2014-02-09 14:50:44 +00:00
David Blaikie
3070639d19 Fix formatting introduced in r200941
llvm-svn: 201043
2014-02-09 09:49:29 +00:00
Arnold Schwaighofer
0bd2bb3092 LoopVectorizer: Keep track of conditional store basic blocks
Before conditional store vectorization/unrolling we had only one
vectorized/unrolled basic block. After adding support for conditional store
vectorization this will not only be one block but multiple basic blocks. The
last block would have the back-edge. I updated the code to use a vector of basic
blocks instead of a single basic block and fixed the users to use the last entry
in this vector. But, I forgot to add the basic blocks to this vector!

Fixes PR18724.

llvm-svn: 201028
2014-02-08 20:41:13 +00:00
Rafael Espindola
8d47aa1e4e Pass the Mangler by reference.
It is never null and it is not used in casts, so there is no reason to use a
pointer. This matches how we pass TM.

llvm-svn: 201025
2014-02-08 14:53:28 +00:00
Rafael Espindola
1d50d1310d Add LLVM_OVERRIDE to a few declarations.
llvm-svn: 201022
2014-02-08 06:07:27 +00:00
Juergen Ributzka
a44e3756e3 [Constant Hoisting] Fix insertion point for constant materialization.
The bitcast instruction during constant materialization was not placed correcly
in the presence of phi nodes. This commit fixes the insertion point to be in the
idom instead.

This fixes PR18768

llvm-svn: 201009
2014-02-08 00:20:49 +00:00
Juergen Ributzka
5435f3e6f6 [Constant Hoisting] Don't update the use list while traversing it - DOH!
This fix first traverses the whole use list of the constant expression and
keeps track of the instructions that need to be updated. Then perform the
fixup afterwards.

llvm-svn: 201008
2014-02-08 00:20:45 +00:00
Rafael Espindola
c2cdd4e91a Remove dead code.
llvm-svn: 201006
2014-02-07 23:32:41 +00:00
Rafael Espindola
edad45fa11 Always create a temporary symbol to use with the cfi frame.
This is a small simplification and a small step in fixing pr18743 since
private functions on MachO should be using a 'l' prefix.

llvm-svn: 200994
2014-02-07 21:23:18 +00:00
Renato Golin
9fd4f091dc Remove -arm-disable-ehabi option
llvm-svn: 200988
2014-02-07 20:12:49 +00:00
Rafael Espindola
502d31bb04 Don't internalize linkonce_odr non constant variables.
llvm-svn: 200983
2014-02-07 19:04:43 +00:00
Alexander Kornienko
2c5d8ebf79 Fix an invalid check for duplicate option categories.
An intermediate solution until the problems with analyzer plugins linking with
llvm/Support and causing assertions due to duplicate GeneralCategory are solved.

llvm-svn: 200981
2014-02-07 17:42:30 +00:00