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60cc8da341
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1180 Commits

Author SHA1 Message Date
Evan Cheng
60cc8da341 Remove unnecessary let hasCtrlDep=1 now it can be inferred. 
llvm-svn: 24611
 2005-12-05 23:09:43 +00:00
Chris Lattner
3583f5337b Several things: 
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.

llvm-svn: 24599
 2005-12-05 02:40:25 +00:00
Evan Cheng
1ce02890ce Added isel patterns for RET, JMP, and WRITEPORT. 
llvm-svn: 24588
 2005-12-04 08:19:43 +00:00
Chris Lattner
4d34819930 Fix PR672 another way which should be more robust 
llvm-svn: 24585
 2005-12-04 06:03:50 +00:00
Chris Lattner
1b8459d092 Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672. 
This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on.  Given a clean nightly tester run, we should be able to turn it
on by default!

llvm-svn: 24578
 2005-12-03 07:15:55 +00:00
Chris Lattner
a2a404ff3a add a note 
llvm-svn: 24572
 2005-12-02 00:11:20 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Evan Cheng
f1352fa7d6 Proper support for shifts with register shift value. 
llvm-svn: 24559
 2005-12-01 00:43:55 +00:00
Chris Lattner
b88f251144 SelectNodeTo now returns its result, we must pay attention to it. 
llvm-svn: 24550
 2005-11-30 22:59:19 +00:00
Nate Begeman
47bb0eba00 Fix a typo in my latest change 
llvm-svn: 24542
 2005-11-30 18:57:39 +00:00
Nate Begeman
84be54b731 No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Chris Lattner
fdc786b18f Fix a bug in a recent patch that broke shifts 
llvm-svn: 24526
 2005-11-30 05:11:18 +00:00
Evan Cheng
bc51bc83b6 Added support to STORE and shifts to DAG to DAG isel. 
llvm-svn: 24525
 2005-11-30 02:51:20 +00:00
Evan Cheng
16b8b9d532 Fixed a minor bug: - -offset != offset iff offset == MININT 
llvm-svn: 24522
 2005-11-30 01:59:00 +00:00
Evan Cheng
f412b7ba0c Add more X86 ISel patterns. 
llvm-svn: 24520
 2005-11-29 19:38:52 +00:00
Chris Lattner
47feb1ecbb No targets support line number info yet. 
llvm-svn: 24513
 2005-11-29 06:16:21 +00:00
Chris Lattner
0edc0fd222 Add a missed optimization 
llvm-svn: 24495
 2005-11-28 04:52:39 +00:00
Chris Lattner
3efe6171f1 Use HasDotTypeDotSizeDirective instead of forELF 
llvm-svn: 24481
 2005-11-21 23:06:54 +00:00
Chris Lattner
fb4a026c32 Remove a level of indentation by using a continue. 
llvm-svn: 24479
 2005-11-21 22:48:18 +00:00
Chris Lattner
d17b6f1f1f Simplify the subtarget info, allow the asmwriter to do some target sensing 
based on TargetType.

llvm-svn: 24478
 2005-11-21 22:43:58 +00:00
Chris Lattner
77bd127e14 Use subtarget information computed by X86Subtarget instead of rolling our own. 
llvm-svn: 24477
 2005-11-21 22:39:40 +00:00
Chris Lattner
4e1e8b180b Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin, 
or native Win32

llvm-svn: 24476
 2005-11-21 22:31:58 +00:00
Chris Lattner
0a2fc68b8a Add a forELF flag, allowing the removal of forCygwin and simplification of 
conditionals.

llvm-svn: 24475
 2005-11-21 22:19:48 +00:00
Chris Lattner
fe8b9b90d4 simplify and genericize this code 
llvm-svn: 24473
 2005-11-21 19:50:31 +00:00
Chris Lattner
9a74c980e8 prune #include 
llvm-svn: 24468
 2005-11-21 08:33:17 +00:00
Chris Lattner
03d9332c4f Switch to using the shared constant pool printer, along with using shorter 
CPI ids

llvm-svn: 24467
 2005-11-21 08:32:23 +00:00
Chris Lattner
3e2c6c1d15 Adjust to capitalized AsmPrinter method names 
llvm-svn: 24456
 2005-11-21 07:51:23 +00:00
Chris Lattner
0716cec311 Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin 
port to properly use L for the bb prefix instead of .

llvm-svn: 24454
 2005-11-21 07:43:59 +00:00
Chris Lattner
83215f8935 convert the rest of this over to use SwitchSection 
llvm-svn: 24448
 2005-11-21 07:16:34 +00:00
Chris Lattner
a19d2349b1 Start using the AsmPrinter shared SwitchSection code. This allows the X86 
backend to implement global variables in sections.

llvm-svn: 24447
 2005-11-21 07:11:11 +00:00
Chris Lattner
e5d0064a9d Rename SwitchSection -> switchSection to avoid conflicting with a future 
change.

llvm-svn: 24443
 2005-11-21 06:55:27 +00:00
Chris Lattner
00a2d1554b Naturally align doubles in the constant pool, set PrivateGlobalPrefix on 
darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.

llvm-svn: 24440
 2005-11-21 06:46:22 +00:00
Chris Lattner
d122fc01dd Lower READCYCLECOUNTER correctly, preserving the chain result 
llvm-svn: 24438
 2005-11-20 22:57:19 +00:00
Chris Lattner
5d9ecff961 encode rdtsc correctly 
llvm-svn: 24435
 2005-11-20 22:13:18 +00:00
Chris Lattner
f4f66fafd9 use chain operands to ensure the copies don't wander from the rdtsc instruction. 
llvm-svn: 24434
 2005-11-20 22:01:40 +00:00
Andrew Lenharth
a369904fc5 The second patch of X86 support for read cycle counter. 
llvm-svn: 24430
 2005-11-20 21:41:10 +00:00
Chris Lattner
af79013023 Teach the x86 backend about the register constraints of its addressing mode. 
Patch by Evan Cheng

llvm-svn: 24423
 2005-11-19 07:01:30 +00:00
Chris Lattner
6e0171ba8b Add load and other support to the dag-dag isel. Patch contributed by Evan 
Cheng!

llvm-svn: 24419
 2005-11-19 02:11:08 +00:00
Chris Lattner
72fa26a85b add more patterns, patch by Evan Cheng. 
llvm-svn: 24406
 2005-11-18 01:04:42 +00:00
Chris Lattner
f829636c6b Add patterns for some 16-bit immediate instructions, patch contributed by 
Evan Cheng.

llvm-svn: 24384
 2005-11-17 02:01:55 +00:00
Chris Lattner
fec54e57a0 Add patterns for several simple instructions that take i32 immediates. 
Patch contributed by Evan Cheng!

llvm-svn: 24382
 2005-11-16 22:59:19 +00:00
Chris Lattner
9caa214f72 initial step at adding a dag-to-dag isel for X86 backend. Patch contributed 
by Evan Cheng!

llvm-svn: 24371
 2005-11-16 01:54:32 +00:00
Chris Lattner
792ac11aee Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch 
contributed by Evan Cheng.

llvm-svn: 24358
 2005-11-15 00:40:23 +00:00
Chris Lattner
3fdc97d460 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 
llvm-svn: 24233
 2005-11-08 02:11:51 +00:00
Chris Lattner
bdcb2a99b6 add a note that Nate mentioned last week 
llvm-svn: 23898
 2005-10-23 21:44:59 +00:00
Chris Lattner
11c044d7cf Put some of my random notes somewhere public 
llvm-svn: 23897
 2005-10-23 19:52:42 +00:00
Nate Begeman
6c42f509bc Invert the TargetLowering flag that controls divide by consant expansion. 
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853
 2005-10-21 00:02:42 +00:00
Nate Begeman
0eeb198d81 Remove some dead code now that the dag combiner exists. 
llvm-svn: 23754
 2005-10-15 22:08:02 +00:00
Nate Begeman
3b6c2df603 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery

llvm-svn: 23735
 2005-10-14 22:06:00 +00:00
Chris Lattner
462fe8b2cc silence some warnings 
llvm-svn: 23594
 2005-10-02 16:29:36 +00:00