RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
Code Issues Projects Releases Wiki Activity
85,575 Commits 4 Branches 5 Tags 704 MiB
61b37b272d
Commit Graph

4147 Commits

Author SHA1 Message Date
Sean Silva
61b37b272d tblgen: Compile TableGen without RTTI. 
TableGen no longer needs RTTI!

llvm-svn: 165651
 2012-10-10 20:27:18 +00:00
Sean Silva
f01bff0182 tblgen: Move mini Type hierarchy to LLVM-style RTTI. 
llvm-svn: 165648
 2012-10-10 20:24:49 +00:00
Sean Silva
cbe79850e7 tblgen: Use semantically correct RTTI functions. 
Also, some minor cleanup.

llvm-svn: 165647
 2012-10-10 20:24:47 +00:00
Sean Silva
a6a1c05042 tblgen: Mechanically move dynamic_cast<> to dyn_cast<>. 
Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>.
That will happen in a future patch.

There are also two dyn_cast_or_null<>'s slipped in instead of
dyn_cast<>'s, since they were causing crashes with just dyn_cast<>.

llvm-svn: 165646
 2012-10-10 20:24:43 +00:00
Bill Wendling
a55d5af923 Pass into the AttributeWithIndex::get method an ArrayRef of attribute 
enums. These are then created via the correct Attributes creation method.

llvm-svn: 165607
 2012-10-10 06:13:42 +00:00
Andrew Trick
782f561e6a TableGen subtarget emitter cleanup. 
Consistently evaluate Aliases and Sequences recursively.

llvm-svn: 165604
 2012-10-10 05:43:13 +00:00
Andrew Trick
13b4f59560 misched: Generate IsBuffered flag for machine resources. 
llvm-svn: 165602
 2012-10-10 05:43:04 +00:00
Micah Villmow
fe3338a7eb Move TargetData to DataLayout. 
llvm-svn: 165403
 2012-10-08 16:39:34 +00:00
Chad Rosier
179f50da7a [ms-inline asm] Add a few typedefs to simplify future changes. 
llvm-svn: 165324
 2012-10-05 18:41:14 +00:00
Sean Silva
f8b271827e tblgen: Replace uses of dynamic_cast<XXXRecTy> with dyn_cast<>. 
This is a mechanical change of dynamic_cast<> to dyn_cast<>. A number of
these uses are actually more like isa<> or cast<>, and will be changed
to the semanticaly appropriate one in a future patch.

llvm-svn: 165291
 2012-10-05 03:31:58 +00:00
Andrew Trick
d6d5b63b3b Added instregex support to TableGen subtarget emitter. 
This allows the processor-specific machine model to override selected
base opcodes without any fanciness.
e.g. InstRW<[CoreXWriteVANDP], (instregex "VANDP")>.

llvm-svn: 165180
 2012-10-03 23:06:32 +00:00
Andrew Trick
00263532fa TableGen subtarget emitter, nearly first class support for SchedAlias. 
A processor can now arbitrarily alias one SchedWrite onto
another. Only the SchedAlias definition need be within the processor
model. The aliased SchedWrite may be a SchedVariant, WriteSequence, or
transitively refer to another alias.

llvm-svn: 165179
 2012-10-03 23:06:28 +00:00
Andrew Trick
35fd7cbe58 Cleanup TableGen subtarget emitter. 
llvm-svn: 165178
 2012-10-03 23:06:25 +00:00
Chad Rosier
9c4444321b [ms-inline asm] Default to the 'm' constraint. This matches the behavior of the 
MSVC compiler.

llvm-svn: 165174
 2012-10-03 22:18:38 +00:00
Sean Silva
c8c1f73145 tblgen: Migrate llvm-tblgen to new TableGenMain API. 
llvm-svn: 165166
 2012-10-03 21:29:19 +00:00
Chad Rosier
37e4157d8c Fix 80-column violations. Cleanup whitespace in generated code. 
llvm-svn: 164983
 2012-10-02 00:25:57 +00:00
Chad Rosier
5e80eb4c86 [ms-inline asm] Add the convertToMapAndConstraints() function that is used to 
map constraints and MCInst operands to inline asm operands.  This replaces the
getMCInstOperandNum() function.

The logic to determine the constraints are not in place, so we still default to
a register constraint (i.e., "r"). Also, we no longer build the MCInst but
rather return just the opcode to get the MCInstrDesc.

llvm-svn: 164979
 2012-10-01 23:45:51 +00:00
Sylvestre Ledru
b77340e506 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767 
llvm-svn: 164768
 2012-09-27 10:14:43 +00:00
Sylvestre Ledru
1c5e7904de Fix a typo 'iff' => 'if' 
llvm-svn: 164767
 2012-09-27 09:59:43 +00:00
Chad Rosier
4c89e0343a Rather then have a wrapper function, have tblgen instantiate the implementation. 
Also remove an unused argument.

llvm-svn: 164567
 2012-09-24 22:57:55 +00:00
Chad Rosier
599b467187 Rather then have a wrapper function, have tblgen instantiate the implementation. 
llvm-svn: 164548
 2012-09-24 19:32:29 +00:00
Andrew Trick
7a73f9d7f4 Machine Model (-schedmodel only). Added SchedAliases. 
Allow subtargets to tie SchedReadWrite types to processor specific
sequences or variants.

llvm-svn: 164451
 2012-09-22 02:24:21 +00:00
Chad Rosier
fd5e542cea [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser. 
llvm-svn: 164420
 2012-09-21 22:21:26 +00:00
Chad Rosier
64fd35f379 Whitespace. 
llvm-svn: 164406
 2012-09-21 19:25:59 +00:00
Dmitri Gribenko
aeecde380d Clarify comment. 
llvm-svn: 164371
 2012-09-21 15:26:34 +00:00
Micah Villmow
cb0e426061 Add in new data types that are used by AMDIL/ANL among others. 
llvm-svn: 164261
 2012-09-19 22:47:07 +00:00
Owen Anderson
76c554cf2a Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). 
llvm-svn: 164256
 2012-09-19 22:15:06 +00:00
Craig Topper
abbf768c15 Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 
llvm-svn: 164204
 2012-09-19 06:37:45 +00:00
Andrew Trick
3ed8eed2ed SchedMachineModel: compress the CPU's WriteLatencyTable. 
llvm-svn: 164199
 2012-09-19 04:43:19 +00:00
Sean Silva
a07c612e3e Iterate deterministicaly over ClassInfo*'s 
Fixes an observed instance of nondeterministic TableGen output.

Review by Jakob.

llvm-svn: 164191
 2012-09-19 01:47:03 +00:00
Sean Silva
c291496fe7 Iterate deterministically over register classes 
Fixes an observed instance of nondeterministic TableGen output.

Review by Jakob.

llvm-svn: 164190
 2012-09-19 01:47:01 +00:00
Sean Silva
eedf4ffbcb Refactor Record* by-ID comparator to Record.h 
This is a generally useful utility; there's no reason to have it hidden
in CodeGenDAGPatterns.cpp.

Also, rename it to fit the other comparators in Record.h

Review by Jakob.

llvm-svn: 164189
 2012-09-19 01:47:00 +00:00
Benjamin Kramer
9958678403 FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character after the colon. 
llvm-svn: 164165
 2012-09-18 20:51:39 +00:00
Craig Topper
2c492a1861 Make custom operand parsing mnemonic indices use the same mnemonic table as the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets. 
llvm-svn: 164109
 2012-09-18 07:02:21 +00:00
Craig Topper
c4107aa8c2 Use variable type for index into mnemonic table. Shrinks size of index field on in tree targets. Saving static data space. 
llvm-svn: 164108
 2012-09-18 06:10:45 +00:00
Andrew Trick
6cba50cbb4 Replaced ReInitMCSubtargetInfo with InitMCProcessor. 
Now where we used to call ReInitMCSubtargetInfo, we actually recompute
the same information as InitMCSubtargetInfo instead of only setting
the feature bits.

llvm-svn: 164105
 2012-09-18 05:33:15 +00:00
Andrew Trick
73e100e6f5 comment typo 
llvm-svn: 164097
 2012-09-18 04:03:30 +00:00
Andrew Trick
418db6184f TableGen subtarget emitter. Use getSchedClassIdx. 
llvm-svn: 164096
 2012-09-18 03:55:55 +00:00
Andrew Trick
b7b658d440 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants. 
llvm-svn: 164095
 2012-09-18 03:41:43 +00:00
Andrew Trick
c2ee4420fd TableGen subtarget emitter. Remove unnecessary header dependence. 
llvm-svn: 164094
 2012-09-18 03:32:57 +00:00
Andrew Trick
65c7aae93f TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model. 
llvm-svn: 164092
 2012-09-18 03:18:56 +00:00
Craig Topper
24762462b0 Mark asm matcher conversion table as const. 
llvm-svn: 164088
 2012-09-18 01:41:49 +00:00
Craig Topper
5f44668251 Fix typo in comment. No functional change. 
llvm-svn: 164086
 2012-09-18 01:13:36 +00:00
Andrew Trick
2b04a12c0c Backout the wrong subtarget emitter fix 
llvm-svn: 164078
 2012-09-17 23:14:15 +00:00
Andrew Trick
1956ad7efe Fix release build after reverting 
llvm-svn: 164075
 2012-09-17 23:05:04 +00:00
Andrew Trick
150c97940b Revert r164061-r164067. Most of the new subtarget emitter. 
I have to work out the Target/CodeGen header dependencies
before putting this back.

llvm-svn: 164072
 2012-09-17 23:00:42 +00:00
Andrew Trick
9400ee3c79 InitMCProcessor 
llvm-svn: 164066
 2012-09-17 22:19:12 +00:00
Andrew Trick
81e5a058f2 comment typo 
llvm-svn: 164064
 2012-09-17 22:19:04 +00:00
Andrew Trick
22072f5bf2 TableGen subtarget emitter. Use getSchedClassIdx. 
llvm-svn: 164063
 2012-09-17 22:19:01 +00:00
Andrew Trick
7403ff5282 TableGen subtarget emitter. Generate resolveSchedClass generated hook for resolving instruction variants. 
llvm-svn: 164062
 2012-09-17 22:18:58 +00:00