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Commit Graph

41433 Commits

Author SHA1 Message Date
Nick Lewycky
7ceb1c1d32 Add "sample" documentation to sample project.
This fixes part of PR2793.

llvm-svn: 56198
2008-09-15 05:31:29 +00:00
Dan Gohman
6418cb3998 Fix WriteAsOperand to not emit a leading space character. Adjust
its callers to emit a space character before calling it when a
space is needed.

This fixes several spurious whitespace issues in
ScalarEvolution's debug dumps. See the test changes for
examples.

This also fixes odd space-after-tab indentation in the output
for switch statements, and changes calls from being printed like
this:
  call void @foo( i32 %x )
to this:
  call void @foo(i32 %x)

llvm-svn: 56196
2008-09-14 17:21:12 +00:00
Dale Johannesen
57fc1bdfdc adjust last patch per review feedback
llvm-svn: 56194
2008-09-14 01:44:36 +00:00
Gabor Greif
2c1afeb67b minor correction
llvm-svn: 56190
2008-09-13 18:51:27 +00:00
Dan Gohman
fa32c7c6d9 Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
2008-09-13 17:58:21 +00:00
Duncan Sands
8d5640ac90 Fix PR2792: treat volatile loads as writing memory somewhere.
Treat stores as reading memory, just to play safe.

llvm-svn: 56188
2008-09-13 12:45:50 +00:00
Evan Cheng
63b98ccd5e Fix random abort.
llvm-svn: 56184
2008-09-13 01:55:59 +00:00
Dan Gohman
3450a8252f Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.

llvm-svn: 56183
2008-09-13 01:54:27 +00:00
Evan Cheng
775a37e4b4 Typo.
llvm-svn: 56182
2008-09-13 01:44:01 +00:00
Evan Cheng
200cdea934 Rely on instruction format to determine so_reg operand for now.
llvm-svn: 56181
2008-09-13 01:38:29 +00:00
Evan Cheng
0a3a595612 Revert 56176. All those instruction formats are still needed.
llvm-svn: 56180
2008-09-13 01:35:33 +00:00
Evan Cheng
1ac0a5f278 Accidentially flipped the condition.
llvm-svn: 56179
2008-09-13 01:29:57 +00:00
Evan Cheng
d68f2947a9 Add debug dumps.
llvm-svn: 56178
2008-09-13 01:15:21 +00:00
Evan Cheng
18fd8337b3 Eliminate unnecessary instruction formats.
llvm-svn: 56176
2008-09-12 23:15:39 +00:00
Evan Cheng
66e7651a16 Addrmode 1 S bit can be dynamically set. Look for CPSR def.
llvm-svn: 56172
2008-09-12 22:45:55 +00:00
Evan Cheng
adf6720626 Rewrite address mode 1 code emission routines.
llvm-svn: 56171
2008-09-12 22:01:15 +00:00
Duncan Sands
ed2eeb11d8 The "alias" keyword comes first.
llvm-svn: 56170
2008-09-12 20:48:21 +00:00
Evan Cheng
07046dae41 On some targets, non-move instructions can become move instructions because of coalescing. e.g.
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1   // after coalescing vr0 with vr1

Update the value# of the destination register with the copy instruction if that happens.

llvm-svn: 56165
2008-09-12 18:13:14 +00:00
Dan Gohman
082879cfde Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.

llvm-svn: 56162
2008-09-12 18:08:03 +00:00
Dale Johannesen
6395da3510 Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161
2008-09-12 17:49:03 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
2008-09-12 16:56:44 +00:00
Duncan Sands
05a3e3ea40 Give GlobalsModRef a whirl in the nightly testers.
I placed it just before GVN because that it is the
pass most likely to benefit from it.  Some quick
and dirty testing confirms that this is a decent
place for it.

llvm-svn: 56144
2008-09-12 08:23:37 +00:00
Duncan Sands
94a4573005 Rather than marking all internal globals "Ref"
when a readonly declaration is called, set a
flag.  This is faster and uses less memory.
In theory it is less accurate, because before
only those internal globals that were read
by someone were being marked "Ref", but now
all are.  But in practice, thanks to other
passes, all internal globals of the kind
considered here will be both read and stored
to: those only read will have been turned
into constants, and those only stored to will
have been deleted.

llvm-svn: 56143
2008-09-12 07:29:58 +00:00
Dale Johannesen
fbc17046ff The sequence for ppcf128 compares was not IEEE
safe in the presence of NaNs.

llvm-svn: 56136
2008-09-12 00:30:56 +00:00
Dan Gohman
0b6d3a9a9b On 64-bit targets, change 32-bit getelementptr indices to be 64-bit
getelementptr indices, inserting an explicit cast if necessary.
This helps expose the sign-extension operation to other optimizations.

llvm-svn: 56133
2008-09-11 23:06:38 +00:00
Dan Gohman
5e154a591d Fix a vectorshuffle instcombine bug introduced by r55995.
Patch by Nicolas Capens!

llvm-svn: 56129
2008-09-11 22:47:57 +00:00
Arnold Schwaighofer
9cfcc68e04 Add indirect tail call (function pointer) examples.
llvm-svn: 56127
2008-09-11 22:24:28 +00:00
Jim Grosbach
a25a322741 udpate header comment: s/VP/VFP/
llvm-svn: 56126
2008-09-11 21:41:29 +00:00
Arnold Schwaighofer
adfb111f10 When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case.
llvm-svn: 56119
2008-09-11 20:28:43 +00:00
Evan Cheng
5c7e3783ef Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g.
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.

llvm-svn: 56118
2008-09-11 20:07:10 +00:00
Owen Anderson
743d45821a Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel.
llvm-svn: 56117
2008-09-11 19:44:55 +00:00
Duncan Sands
0a66a0ae55 Fix comment typo.
llvm-svn: 56116
2008-09-11 19:41:10 +00:00
Duncan Sands
39a7ae3d01 Intrinsics don't touch internal global variables
(unless passed one via a parameter), even if they
are IntrWriteMem.

llvm-svn: 56115
2008-09-11 19:35:55 +00:00
Dan Gohman
4ae5fa57b4 Fix a copy+paste bug that Duncan spotted. For several
cases it was still getting lucky and detecting overflow
but it was clearly incorrect.

llvm-svn: 56113
2008-09-11 18:53:02 +00:00
Evan Cheng
99be914c9a Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check.
llvm-svn: 56112
2008-09-11 18:40:32 +00:00
Evan Cheng
5a170cec33 Eliminate some unused methods.
llvm-svn: 56108
2008-09-11 17:31:47 +00:00
Evan Cheng
2d51d1299e Indentation.
llvm-svn: 56107
2008-09-11 17:31:12 +00:00
Jim Grosbach
f53af44e09 lib/Target/SubtargetFeature.cpp asserts that the FeatureKV[] table be sorted
by its first field, but TableGen doesn't actually enforce creating it that 
way. TableGen sorts the records that will be used to create it by the names 
of the records, not the Name field of those records.

This patch corrects the sort to use the "Name" field of the record as the 
sort key.

llvm-svn: 56106
2008-09-11 17:05:32 +00:00
Duncan Sands
908b7525fa Intrinsics don't read these kinds of global
variables.

llvm-svn: 56105
2008-09-11 15:43:12 +00:00
Evan Cheng
aebadcd733 Change getSubReg semantics. It now returns zero if the specified register doesn't have a subreg of the specified index.
llvm-svn: 56099
2008-09-11 06:25:25 +00:00
Evan Cheng
9de997d5de Fix a 80 column violation.
llvm-svn: 56097
2008-09-11 05:58:06 +00:00
Dale Johannesen
10e1cf3df2 The version of AtomicSDNode::AtomicSDNode used (only) for
cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional.  Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.

From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out.  I
cannot test on that platform.

llvm-svn: 56091
2008-09-11 03:12:59 +00:00
Owen Anderson
139baa5f74 If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on
X86-64 in fast isel.

llvm-svn: 56088
2008-09-11 02:41:37 +00:00
Dale Johannesen
8ac17c1f77 Succumb utterly to compatibility and implement
__sync_fetch_and_nand as ANDC, even though that's
not what nand means.

llvm-svn: 56087
2008-09-11 02:15:03 +00:00
Evan Cheng
b879f93ba5 Propagate subreg index when promoting a load to a copy.
llvm-svn: 56085
2008-09-11 01:02:12 +00:00
Dan Gohman
36e01356ec In my analysis for r56076 I missed the case where the original
multiplication overflows.

llvm-svn: 56082
2008-09-11 00:25:00 +00:00
Dan Gohman
ebfb483309 Fix an icmp+sdiv optimization to check for and handle an overflow
condition. This fixes PR2740.

llvm-svn: 56076
2008-09-10 23:30:57 +00:00
Dan Gohman
4646a3791e Add more documentation advertising the -view-*-dags options.
llvm-svn: 56073
2008-09-10 22:23:41 +00:00
Dan Gohman
9eca554828 X86FastISel support for double->float and float->double casts.
llvm-svn: 56070
2008-09-10 21:02:08 +00:00
Dan Gohman
ad5824104b FastISel support for i1 PHI nodes.
llvm-svn: 56069
2008-09-10 21:01:31 +00:00