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64622a0ddf
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17966 Commits

Author SHA1 Message Date
Anton Korobeynikov
64622a0ddf Remove dead code 
llvm-svn: 35380
 2007-03-27 12:05:48 +00:00
Anton Korobeynikov
b58a93156f Split big monster into small helpers. No functionality change. 
llvm-svn: 35379
 2007-03-27 11:29:11 +00:00
Evan Cheng
7218d782fe SDISel does not preserve all, it changes CFG and other info. 
llvm-svn: 35376
 2007-03-27 00:53:36 +00:00
Evan Cheng
c81bdb4100 Don't call getOperandConstraint() if operand index is greater than 
TID->numOperands.

llvm-svn: 35375
 2007-03-27 00:48:28 +00:00
Devang Patel
8330ee3120 Spell check. 
llvm-svn: 35374
 2007-03-27 00:16:08 +00:00
Reid Spencer
e4b331a4f2 Implement some minor review feedback. 
llvm-svn: 35373
 2007-03-26 23:58:26 +00:00
Reid Spencer
0cdfe48fc8 For PR1271: 
Fix another incorrectly converted shift mask.

llvm-svn: 35371
 2007-03-26 23:45:51 +00:00
Devang Patel
c2708c8ccb Reduce malloc/free traffic. 
llvm-svn: 35370
 2007-03-26 23:19:29 +00:00
Devang Patel
58a8e74de6 It is not possible to determie dominance between two PHI nodes 
based on their ordering.

llvm-svn: 35369
 2007-03-26 23:18:28 +00:00
Devang Patel
3062ae001d Use std::vector<DFCalculateWorkObject> instead of 
std::vector<DFCalculateWorkObject *> to reduce malloc/free traffic.

llvm-svn: 35368
 2007-03-26 23:17:19 +00:00
Evan Cheng
968135bd3f findRegisterUseOperand() changed. 
llvm-svn: 35366
 2007-03-26 22:41:48 +00:00
Evan Cheng
0ff19780f9 Fix for PR1266. Don't mark a two address operand IsKill. 
llvm-svn: 35365
 2007-03-26 22:40:42 +00:00
Evan Cheng
201771637e Change findRegisterUseOperand() to return operand index instead. 
llvm-svn: 35363
 2007-03-26 22:37:45 +00:00
Dale Johannesen
3ad8ab7b61 Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable to 
hopefully forestall similar errors.

llvm-svn: 35362
 2007-03-26 22:23:54 +00:00
Chris Lattner
16700ef424 eliminate use of std::set 
llvm-svn: 35361
 2007-03-26 20:40:50 +00:00
Reid Spencer
4af99334ea Add a comment to explain a folding transform. 
llvm-svn: 35360
 2007-03-26 20:09:02 +00:00
Reid Spencer
73d778edb7 Get better debug output by having modified instructions print both the 
original and new instruction. A slight performance hit with ostringstream
but it is only for debug.
Also, clean up an uninitialized variable warning noticed in a release build.

llvm-svn: 35358
 2007-03-26 17:44:01 +00:00
Reid Spencer
3fea170ecd Get the number of bits to set in a mask correct for a shl/lshr transform. 
llvm-svn: 35357
 2007-03-26 17:18:58 +00:00
Bill Wendling
8065cc3173 Promote to v1i64 type... 
llvm-svn: 35353
 2007-03-26 08:03:33 +00:00
Bill Wendling
3c4e130b77 Updated. 
llvm-svn: 35352
 2007-03-26 07:55:58 +00:00
Bill Wendling
a42484728c Add support for the v1i64 type. This makes better code for this: 
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351
 2007-03-26 07:53:08 +00:00
Evan Cheng
5b1c21d27b SIGN_EXTEND_INREG requires one extra operand, a ValueType node. 
llvm-svn: 35350
 2007-03-26 07:12:51 +00:00
Reid Spencer
a6a4dbd24e For PR1271: 
Fix SingleSource/Regression/C/2003-05-21-UnionBitFields.c by changing a
getHighBitsSet call to getLowBitsSet call that was incorrectly converted
from the original lshr constant expression.

llvm-svn: 35348
 2007-03-26 05:25:00 +00:00
Dale Johannesen
43fc14d6e4 Look through bitcast when finding IVs. (Chris' patch really.) 
llvm-svn: 35347
 2007-03-26 03:01:27 +00:00
Reid Spencer
4d3d7d0f2a For PR1271: 
Remove a use of getLowBitsSet that caused the mask used for replacement of
shl/lshr pairs with an AND instruction to be computed incorrectly. Its not
clear exactly why this is the case. This solves the disappearing shifts
problem, but it doesn't fix Regression/C/2003-05-21-UnionBitFields. It
seems there is more going on.

llvm-svn: 35342
 2007-03-25 21:11:44 +00:00
Chris Lattner
26cfd91db8 implement Transforms/InstCombine/cast2.ll:test3 and PR1263 
llvm-svn: 35341
 2007-03-25 20:43:09 +00:00
Reid Spencer
1677543a3a Some cleanup from review: 
* Don't assume shift amounts are <= 64 bits
* Avoid creating an extra APInt in SubOne and AddOne by using -- and ++
* Add another use of getLowBitsSet
* Convert a series of if statements to a switch

llvm-svn: 35339
 2007-03-25 19:55:33 +00:00
Anton Korobeynikov
6f78c59650 First step of switch lowering refactoring: perform worklist-driven 
strategy, emit JT's where possible.

llvm-svn: 35338
 2007-03-25 15:07:15 +00:00
Anton Korobeynikov
a5e854461f Fix authorship 
llvm-svn: 35337
 2007-03-25 13:44:26 +00:00
Chris Lattner
f4ff1dc689 fold constantexprs more aggressively, fixing PR1265 
llvm-svn: 35336
 2007-03-25 05:47:04 +00:00
Reid Spencer
8449e5fa0e Refactor several ConstantExpr::getXXX calls with ConstantInt arguments 
using the facilities of APInt. While this duplicates a tiny fraction of
the constant folding code, it also makes the code easier to read and
avoids large ConstantExpr overhead for simple, known computations.

llvm-svn: 35335
 2007-03-25 05:33:51 +00:00
Chris Lattner
ee90a087a6 add a note 
llvm-svn: 35334
 2007-03-25 05:10:46 +00:00
Zhou Sheng
3312a86598 1. Avoid unnecessary APInt construction if possible. 
2. Use isStrictlyPositive() instead of isPositive() in two places where
   they need APInt value > 0 not only >=0.

llvm-svn: 35333
 2007-03-25 05:01:29 +00:00
Chris Lattner
6f17a615cb Implement support for vector operands to inline asm, implementing 
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll

llvm-svn: 35332
 2007-03-25 05:00:54 +00:00
Chris Lattner
6d8bbccee0 add a note 
llvm-svn: 35330
 2007-03-25 04:46:28 +00:00
Chris Lattner
31c6763051 Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll 
llvm-svn: 35329
 2007-03-25 04:44:03 +00:00
Chris Lattner
4a7feb72f5 implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll 
llvm-svn: 35327
 2007-03-25 04:35:41 +00:00
Reid Spencer
e601991a5e Make more uses of getHighBitsSet and get rid of some pointless & of an 
APInt with its type mask.

llvm-svn: 35325
 2007-03-25 04:26:16 +00:00
Chris Lattner
91adfbe0ff Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll 
llvm-svn: 35324
 2007-03-25 02:18:14 +00:00
Chris Lattner
b19069959d switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.

llvm-svn: 35322
 2007-03-25 02:14:49 +00:00
Reid Spencer
676eeb9c94 More APIntification: 
* Convert the last use of a uint64_t that should have been an APInt.
* Change ComputeMaskedBits to have a const reference argument for the Mask
  so that recursions don't cause unneeded temporaries. This causes temps
  to be needed in other places (where the mask has to change) but this
  change optimizes for the recursion which is more frequent.
* Remove two instances of &ing a Mask with getAllOnesValue. Its not
  needed any more because APInt is accurate in its bit computations.
* Start using the getLowBitsSet and getHighBits set methods on APInt
  instead of shifting. This makes it more clear in the code what is
  going on.

llvm-svn: 35321
 2007-03-25 02:03:12 +00:00
Chris Lattner
18c3c6a01d Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers. 
llvm-svn: 35320
 2007-03-25 02:01:03 +00:00
Chris Lattner
104e73382c enforce the proper range for the i386 N constraint. 
llvm-svn: 35319
 2007-03-25 01:57:35 +00:00
Chris Lattner
92e2ee7b2d Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
llvm-svn: 35318
 2007-03-25 01:44:57 +00:00
Chris Lattner
3f71a6b498 fix a regression on vector or instructions. 
llvm-svn: 35314
 2007-03-24 23:56:43 +00:00
Chris Lattner
57d0c197e6 don't rely on ADL 
llvm-svn: 35299
 2007-03-24 17:37:03 +00:00
Chris Lattner
3a16450eaf add a valuetype for v1i64, which is needed by mmx. 
llvm-svn: 35298
 2007-03-24 17:36:26 +00:00
Zhou Sheng
ce8c7becec Make some codes more efficient. 
llvm-svn: 35297
 2007-03-24 15:34:37 +00:00
Chris Lattner
a04981fbda add a bad case evan though of. 
llvm-svn: 35296
 2007-03-24 06:01:32 +00:00
Reid Spencer
b03fc33244 For PR1205: 
Convert some calls to ConstantInt::getZExtValue() into getValue() and
use APInt facilities in the subsequent computations.

llvm-svn: 35294
 2007-03-24 00:42:08 +00:00