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4 Commits

Author SHA1 Message Date
Saleem Abdulrasool
e5bf2f858c ARM: yet another round of ARM test clean ups 
llvm-svn: 205586
 2014-04-03 23:47:24 +00:00
Joerg Sonnenberger
2826f5b278 Enabling thumb2 mode used to force support for armv6t2. Replace this 
with a temporary assertion and adjust the various test cases.

llvm-svn: 197224
 2013-12-13 11:16:00 +00:00
Andrew Trick
a130d110d1 Thumb2 and ARM add/subtract with carry fixes. 
Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>.
t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the
assembly printer correctly prints the 's' suffix.

Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags.

Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS.
Fixes ARM SBC lowering to check for live carry (potential bug).

llvm-svn: 130048
 2011-04-23 03:55:32 +00:00
Jim Grosbach
e2d1ecbe70 Improve 64-subtraction of immediates when parts of the immediate can fit 
in the literal field of an instruction. E.g.,
long long foo(long long a) {
  return a - 734439407618LL;
}

rdar://7038284

llvm-svn: 108339
 2010-07-14 17:45:16 +00:00