1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-02 00:42:52 +01:00
Commit Graph

45 Commits

Author SHA1 Message Date
Dan Gohman
f9654e9258 Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634
2009-12-05 00:44:40 +00:00
Bob Wilson
b293fe32cb Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable
for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low.  The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.

llvm-svn: 90144
2009-11-30 18:35:03 +00:00
Bob Wilson
b1cce5329e Tail duplicate indirect branches for PowerPC, too.
With the testcase for pr3120, the "threaded interpreter" runtime decreases
from 1788 to 1413 with this change.

llvm-svn: 89877
2009-11-25 19:57:14 +00:00
Dale Johannesen
38c9b68ccf Revert the kludge in 76703. I got a clean
bootstrap of FSF-style PPC, so there is some
reason to believe the original bug (which was
never analyzed) has been fixed, probably by
82266.

llvm-svn: 83871
2009-10-12 18:49:00 +00:00
Eli Friedman
1be7dfb1aa Remove unused member functions.
llvm-svn: 76960
2009-07-24 07:43:59 +00:00
Evan Cheng
82499c09ff Let each target determines whether a machine instruction is dead. If true, that allows late codeine passes to delete it.
This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround.

llvm-svn: 76703
2009-07-22 00:25:27 +00:00
Bill Wendling
d31cb3d5aa Move debug loc info along when the spiller creates new instructions.
llvm-svn: 64342
2009-02-12 00:02:55 +00:00
Evan Cheng
9dc1507838 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.

llvm-svn: 64124
2009-02-09 07:14:22 +00:00
Evan Cheng
e00df1d39c Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo.
llvm-svn: 63938
2009-02-06 17:43:24 +00:00
Evan Cheng
b3c82db63d Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
llvm-svn: 62600
2009-01-20 19:12:24 +00:00
Dan Gohman
74529a2226 Split foldMemoryOperand into public non-virtual and protected virtual
parts, and add target-independent code to add/preserve
MachineMemOperands.

llvm-svn: 60488
2008-12-03 18:43:12 +00:00
Dan Gohman
04e99d0f3f Add more const qualifiers. This fixes build breakage from r59540.
llvm-svn: 59542
2008-11-18 19:49:32 +00:00
Dan Gohman
86527c1834 Const-ify several TargetInstrInfo methods.
llvm-svn: 57622
2008-10-16 01:49:15 +00:00
Owen Anderson
5fef19facf Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
was inserted or not.  This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.

llvm-svn: 55375
2008-08-26 18:03:31 +00:00
Owen Anderson
600a8ca0d5 Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
llvm-svn: 54802
2008-08-14 22:49:33 +00:00
Dan Gohman
cd25487258 Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
2008-07-07 23:14:23 +00:00
Evan Cheng
2dfe8c2435 Add option to commuteInstruction() which forces it to create a new (commuted) instruction.
llvm-svn: 52308
2008-06-16 07:33:11 +00:00
Dan Gohman
f9d5689496 Change target-specific classes to use more precise static types.
This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.

llvm-svn: 51091
2008-05-14 01:58:56 +00:00
Nicolas Geoffray
82baa2d2c6 Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
Dan Gohman
2b96ce84aa Add explicit keywords.
llvm-svn: 48801
2008-03-25 22:06:05 +00:00
Bill Wendling
80bc045af5 Change the "enable/disable" mechanism so that we can enable PPC register
scavenging for 32-bit and 64-bit separately.

llvm-svn: 48186
2008-03-10 22:49:16 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Evan Cheng
90f03a0b88 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
llvm-svn: 46893
2008-02-08 21:20:40 +00:00
Owen Anderson
f19692b2f6 Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...

llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Owen Anderson
e6856128ab Move some more instruction creation methods from RegisterInfo into InstrInfo.
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Chris Lattner
1285ec2ae7 Fix a problem where lib/Target/TargetInstrInfo.h would include and use
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
2008-01-01 01:03:04 +00:00
Owen Anderson
ae7e2c1e03 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng
234aab208a RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
llvm-svn: 37192
2007-05-18 00:05:48 +00:00
Jim Laskey
23ed7d2625 Make LABEL a builtin opcode.
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Chris Lattner
1527483a15 start using PPC predicates more consistently.
llvm-svn: 31833
2006-11-17 22:10:59 +00:00
Chris Lattner
a478e05437 implement the BlockHasNoFallThrough hook
llvm-svn: 31264
2006-10-28 17:35:02 +00:00
Chris Lattner
7353b07275 expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
llvm-svn: 31024
2006-10-17 22:41:45 +00:00
Chris Lattner
b90d66b7da implement branch inspection/modification methods.
llvm-svn: 30946
2006-10-13 21:21:17 +00:00
Chris Lattner
d817b32a8e Implement the getPointerRegClass method, which is required for the ptr_rc
magic to work.

llvm-svn: 28847
2006-06-17 00:01:04 +00:00
Chris Lattner
f604017e47 Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
2006-05-24 17:04:05 +00:00
Chris Lattner
ba10d4e4ab Mark instructions that are cracked by the PPC970 decoder as such.
llvm-svn: 26720
2006-03-13 05:15:10 +00:00
Chris Lattner
a278639f29 Several big changes:
1. Use flags on the instructions in the .td file to indicate the PPC970 unit
   type instead of a table in the .cpp file.  Much cleaner.
2. Change the hazard recognizer to build d-groups according to the actual
   algorithm used, not my flawed understanding of it.
3. Model "must be in the first slot" and "must be the only instr in a group"
   accurately.

llvm-svn: 26719
2006-03-12 09:13:49 +00:00
Chris Lattner
af44ead7f3 implement TII::insertNoop
llvm-svn: 26562
2006-03-05 23:49:55 +00:00
Chris Lattner
8337a1050d implement isStoreToStackSlot for PPC
llvm-svn: 25914
2006-02-02 20:16:12 +00:00
Chris Lattner
15cb732cd7 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Chris Lattner
00a483f966 fix out of date comment
llvm-svn: 25422
2006-01-18 19:37:44 +00:00
Chris Lattner
b0d3080ca8 Fix Regression/CodeGen/PowerPC/2006-01-18-InvalidBranchOpcodeAssert.ll
llvm-svn: 25421
2006-01-18 19:35:21 +00:00
Nate Begeman
723637974b More PPC32 -> PPC changes, as well as merging some classes that were
redundant after the change.

llvm-svn: 23759
2005-10-16 05:39:50 +00:00
Chris Lattner
d3946bbea6 Rename PPC32*.h to PPC*.h
This completes the grand PPC file renaming

llvm-svn: 23745
2005-10-14 23:59:06 +00:00