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Commit Graph

28 Commits

Author SHA1 Message Date
Jim Grosbach
343f270350 ARM assembly parsing and encoding support for LDRD(label).
rdar://9932658

llvm-svn: 146921
2011-12-19 23:06:24 +00:00
Jim Grosbach
ed8a320007 ARM load shifted register pre-index fix shift value asm parser encoding.
llvm-svn: 137367
2011-08-11 22:05:09 +00:00
Jim Grosbach
609316e481 ARM STRHT assembly parsing and encoding.
llvm-svn: 137358
2011-08-11 21:39:41 +00:00
Jim Grosbach
5c12d41c95 ARM STRH assembly parsing and encoding.
llvm-svn: 137353
2011-08-11 21:17:22 +00:00
Jim Grosbach
81b2835f83 ARM STRD assembly parsing and encoding.
llvm-svn: 137342
2011-08-11 20:28:23 +00:00
Jim Grosbach
bfc85134c2 ARM STRBT assembly parsing and encoding.
llvm-svn: 137337
2011-08-11 20:04:56 +00:00
Jim Grosbach
87f0f921b5 Add FIXME.
llvm-svn: 137336
2011-08-11 19:43:42 +00:00
Jim Grosbach
a6572a1201 ARM STRB assembly parsing and encoding tests.
llvm-svn: 137335
2011-08-11 19:42:58 +00:00
Jim Grosbach
9673dc9e01 Fix a copy/paste error so that LDRB(register) actually gets tested.
llvm-svn: 137333
2011-08-11 19:34:23 +00:00
Jim Grosbach
986a3eb0b2 ARM STR(register) assembly parsing and encoding tests.
llvm-svn: 137332
2011-08-11 19:26:17 +00:00
Jim Grosbach
e6bd3a1ab8 ARM STR(immediate) assembly parsing and encoding.
llvm-svn: 137331
2011-08-11 19:22:40 +00:00
Jim Grosbach
eb96dd6c99 ARM tests for LDRSHT assembly parsing and encoding.
llvm-svn: 137274
2011-08-10 23:18:30 +00:00
Jim Grosbach
e2cc6866d1 ARM tests for LDRSH assembly parsing and encoding.
llvm-svn: 137272
2011-08-10 23:12:25 +00:00
Jim Grosbach
f65a625648 ARM tests for LDRSBT assembly parsing and encoding.
llvm-svn: 137271
2011-08-10 23:08:56 +00:00
Jim Grosbach
e22ad37645 ARM tests for LDRSB assembly parsing and encoding.
llvm-svn: 137270
2011-08-10 23:06:44 +00:00
Jim Grosbach
f291232aa1 Add FIXME.
llvm-svn: 137265
2011-08-10 22:56:43 +00:00
Jim Grosbach
5c5f1c8305 ARM tests for LDRHT assembly parsing and encoding.
llvm-svn: 137263
2011-08-10 22:55:38 +00:00
Jim Grosbach
7c1596bf26 ARM tests for LDRH(register) assembly parsing and encoding.
llvm-svn: 137261
2011-08-10 22:45:42 +00:00
Jim Grosbach
e0ccd6b34e ARM LDRH(immediate) assembly parsing and encoding support.
llvm-svn: 137260
2011-08-10 22:42:16 +00:00
Jim Grosbach
e0c10a6d0c Add FIXME
llvm-svn: 137258
2011-08-10 22:20:38 +00:00
Jim Grosbach
4ad2dc8bb2 ARM LDRD(register) assembly parsing and encoding.
Add support for literal encoding of #-0 along the way.

llvm-svn: 137254
2011-08-10 21:56:18 +00:00
Jim Grosbach
bbef0044c8 ARM LDRD(immediate) assembly parsing and encoding support.
llvm-svn: 137244
2011-08-10 20:29:19 +00:00
Jim Grosbach
d6da18cf19 ARM parsing and encoding for LDRBT instruction.
Fix the instruction representation to correctly only allow post-indexed form.
Add tests.

llvm-svn: 137074
2011-08-08 23:28:47 +00:00
Jim Grosbach
dce26073db ARM parsing and encoding for LDRB instruction.
llvm-svn: 137071
2011-08-08 22:37:06 +00:00
Jim Grosbach
1dbe50798e Add FIXME.
llvm-svn: 137070
2011-08-08 22:11:33 +00:00
Jim Grosbach
00c4316907 ARM load instruction shifted register index operands.
Parsing and encoding for shifted index operands for load instructions.

llvm-svn: 136986
2011-08-05 22:03:36 +00:00
Jim Grosbach
40a7e379c4 ARM indexed load assembly parsing and encoding.
More parsing support for indexed loads. Fix pre-indexed with writeback
parsing for register offsets and handle basic post-indexed offsets.

llvm-svn: 136982
2011-08-05 21:28:30 +00:00
Jim Grosbach
861430e0bb Add ARM LDR parsing tests.
llvm-svn: 136977
2011-08-05 20:33:39 +00:00