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Commit Graph

8 Commits

Author SHA1 Message Date
Craig Topper
b144f3b6db Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.
llvm-svn: 160420
2012-07-18 04:11:12 +00:00
Richard Barton
9e62efdf5f Add -disassemble support for -show-inst and -show-encode capability llvm-mc. Also refactor so all MC paraphernalia are created once for all uses as much as possible.
The test change is to account for the fact that the default disassembler behaviour has changed with regards to specifying the assembly syntax to use.

llvm-svn: 154809
2012-04-16 11:32:10 +00:00
Charles Davis
a5e1970cd0 Add retw and lretw instructions. Also, fix Intel syntax parsing for all
ret instructions.

llvm-svn: 154468
2012-04-11 01:10:53 +00:00
Bill Wendling
1a3f2619a7 Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.
Patch by Kay Tiong Khoo!

llvm-svn: 152487
2012-03-10 07:37:27 +00:00
Craig Topper
f776e3b410 Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.
llvm-svn: 140974
2011-10-02 21:08:12 +00:00
Craig Topper
655f8a01e6 Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700.
llvm-svn: 140370
2011-09-23 06:57:25 +00:00
Craig Topper
95f048d1ff Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960
llvm-svn: 140299
2011-09-22 07:01:50 +00:00
Craig Topper
23adfa4738 Add disassembler test for Intel syntax. Tests r139353.
llvm-svn: 139356
2011-09-09 06:35:44 +00:00