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2 Commits

Author SHA1 Message Date
Benjamin Kramer
0c823ae0ed Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. 
This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.

llvm-svn: 157634
 2012-05-29 19:05:25 +00:00
Craig Topper
a8657716ac Add the tests that were supposed to go with r153935 that I forgot svn add 
llvm-svn: 154165
 2012-04-06 07:09:59 +00:00