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58163 Commits

Author SHA1 Message Date
Evan Cheng
69cb91fa21 Every pass deserves a name, even codegenprep. 
llvm-svn: 170831
 2012-12-21 01:48:14 +00:00
Nadav Rotem
3d4c6351cf Improve the X86 cost model for loads and stores. 
llvm-svn: 170830
 2012-12-21 01:33:59 +00:00
Nadav Rotem
ec327f0de1 BB-Vectorizer: Check the cost of the store pointer type 
and not the return type, which is void. A number of test
cases fail after adding the assertion in TTImpl.

llvm-svn: 170828
 2012-12-21 01:24:36 +00:00
Reed Kotler
d8213f114a Call llvm_unreachable instead of assert. 
llvm-svn: 170822
 2012-12-21 00:44:59 +00:00
Nadav Rotem
80fefbe978 Fix a bug in the code that checks if we can vectorize loops while using dynamic 
memory bound checks.  Before the fix we were able to vectorize this loop from
the Livermore Loops benchmark:

for ( k=1 ; k<n ; k++ )
  x[k] = x[k-1] + y[k];

llvm-svn: 170811
 2012-12-21 00:07:35 +00:00
Jakob Stoklund Olesen
c000c3d36d Require the two-argument MI::addOperand(MF, MO) for dangling instructions. 
Instructions that are inserted in a basic block can still be decorated
with addOperand(MO).

Make the two-argument addOperand() function contain the actual
implementation. This function will now always have a valid MF reference
that it can use for memory allocation.

llvm-svn: 170798
 2012-12-20 22:54:05 +00:00
Jakob Stoklund Olesen
c81d04b28d Add an MF argument to MI::copyImplicitOps(). 
This function is often used to decorate dangling instructions, so a
context reference is required to allocate memory for the operands.

Also add a corresponding MachineInstrBuilder method.

llvm-svn: 170797
 2012-12-20 22:54:02 +00:00
Jakob Stoklund Olesen
ae8ba671bc Use two-arg addOperand(MF, MO) internally in MachineInstr when possible. 
llvm-svn: 170796
 2012-12-20 22:53:58 +00:00
Jakob Stoklund Olesen
6e5b46e8fb MachineInstrBuilderize ARM. 
llvm-svn: 170795
 2012-12-20 22:53:55 +00:00
Jakob Stoklund Olesen
bbac7014e0 MachineInstrBuilderize NVPTX. 
llvm-svn: 170794
 2012-12-20 22:53:53 +00:00
Eli Bendersky
b205b36a9a Fix an unitialized member variable that may have caused sporadic failures 
for code that wasn't even in bundling mode.

llvm-svn: 170793
 2012-12-20 22:51:52 +00:00
Eric Christopher
537c3f1bc9 Whitespace and 80-column cleanup. 
llvm-svn: 170771
 2012-12-20 21:58:40 +00:00
Eric Christopher
622a4d5b97 Start splitting out the debug string section handling by moving it 
into the DwarfUnits class.

llvm-svn: 170770
 2012-12-20 21:58:36 +00:00
Bill Wendling
31f5f9fc8c Some random comment, naming, and format changes. 
Rename the AttributeImpl* from Attrs to pImpl to be consistent with other code.
Add comments where none were before. Or doxygen-ify other comments.

llvm-svn: 170767
 2012-12-20 21:28:43 +00:00
Jakob Stoklund Olesen
abf1746cb5 Remove two dead functions. 
llvm-svn: 170766
 2012-12-20 21:12:42 +00:00
Bob Wilson
3cae2545eb Revert "Adding support for llvm.arm.neon.vaddl[su].* and" 
This reverts r170694.  The operations can be represented in IR without
adding any new intrinsics.

llvm-svn: 170765
 2012-12-20 21:09:38 +00:00
Nadav Rotem
ccffd4527d LoopVectorize: Fix a bug in the scalarization of instructions. 
Before if-conversion we could check if a value is loop invariant
if it was declared inside the basic block. Now that loops have
multiple blocks this check is incorrect.

This fixes External/SPEC/CINT95/099_go/099_go

llvm-svn: 170756
 2012-12-20 20:24:40 +00:00
Evan Cheng
536195a2fd On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr, 
are more expensive than the non-flag setting variant. Teach thumb2 size
reduction pass to avoid generating them unless we are optimizing for size.

rdar://12892707

llvm-svn: 170728
 2012-12-20 19:59:30 +00:00
Eli Bendersky
b0643bbb71 Aligned bundling support. Following the discussion here: 
http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-December/056754.html

The proposal and implementation are fully documented here:
https://sites.google.com/a/chromium.org/dev/nativeclient/pnacl/aligned-bundling-support-in-llvm

Tests will follow shortly.

llvm-svn: 170718
 2012-12-20 19:05:53 +00:00
Jakob Stoklund Olesen
452a1b6831 Use MachineInstrBuilder for PHI nodes in SelectionDAGISel. 
llvm-svn: 170716
 2012-12-20 18:46:29 +00:00
Jakob Stoklund Olesen
51accf509d Use MachineInstrBuilder in InstrEmitter. 
This is supposed to be a mechanical change with no functional effects.

InstrEmitter can generate all types of MachineOperands which revealed
that MachineInstrBuilder was missing a few methods, added by this patch.

Besides providing a context pointer to MI::addOperand(),
MachineInstrBuilder seems like a better fit for this code.

llvm-svn: 170712
 2012-12-20 18:08:09 +00:00
Jakob Stoklund Olesen
203e10c066 Use MachineInstrBuilder in a few CodeGen passes. 
This automatically passes a context pointer to MI->addOperand().

llvm-svn: 170711
 2012-12-20 18:08:06 +00:00
Nadav Rotem
759544a715 Loop Vectorizer: turn-off if-conversion. 
llvm-svn: 170708
 2012-12-20 17:42:53 +00:00
James Molloy
de926c367f Add a new attribute, 'noduplicate'. If a function contains a noduplicate call, the call cannot be duplicated - Jump threading, loop unrolling, loop unswitching, and loop rotation are inhibited if they would duplicate the call. 
Similarly inlining of the function is inhibited, if that would duplicate the call (in particular inlining is still allowed when there is only one callsite and the function has internal linkage).

llvm-svn: 170704
 2012-12-20 16:04:27 +00:00
Roman Divacky
f63db8e20d Remove MCTargetAsmLexer and its derived classes now that edis, 
its only user, is gone.

llvm-svn: 170699
 2012-12-20 14:43:30 +00:00
Renato Golin
1fbd598908 Adding support for llvm.arm.neon.vaddl[su].* and 
llvm.arm.neon.vsub[su].* intrinsics.

Patch by Pete Couperus <pjcoup@gmail.com>

llvm-svn: 170694
 2012-12-20 13:52:11 +00:00
Craig Topper
92c3efe257 Formatting fixes. Remove some unnecessary 'else' after 'return'. No functional change. 
llvm-svn: 170676
 2012-12-20 07:15:54 +00:00
Craig Topper
39d7615441 Removing trailing whitespace 
llvm-svn: 170675
 2012-12-20 07:09:41 +00:00
Reed Kotler
186128bbff Implement cfi_def_cfa_offset. "Make check" test case for this comming in the 
next few days but it's already tested a lot from test-suite and works fine.
This patch completes almost 100% pass of test-suite for mips 16.

llvm-svn: 170674
 2012-12-20 06:59:37 +00:00
Reed Kotler
4796d835c7 There is one more patch to finish large frames. Make sure we assert 
on code that has large frames which will not yet compile correctly.

llvm-svn: 170673
 2012-12-20 06:57:00 +00:00
Jyotsna Verma
d2eb3f84fd Add constant extender support to GP-relative load/store instructions. 
llvm-svn: 170672
 2012-12-20 06:52:46 +00:00
Jyotsna Verma
cb321ae6c7 Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps. 
llvm-svn: 170671
 2012-12-20 06:45:39 +00:00
Reed Kotler
60c468d16e set register class properly for mips16 here 
llvm-svn: 170669
 2012-12-20 06:06:35 +00:00
Rafael Espindola
498385090a Undefine PPC harder. 
This was causing a build failure while trying to build on ppc ubuntu 12.10 with
cmake.

llvm-svn: 170668
 2012-12-20 05:13:09 +00:00
Reed Kotler
c4679e72b0 This assert is overly restrictive and does not work for mips16. 
llvm-svn: 170667
 2012-12-20 05:09:15 +00:00
Reed Kotler
53002f4e46 Turn on register scavenger for Mips 16 
We use an unused Mips 32 register for the emergency slot
instead of using the stack.

llvm-svn: 170665
 2012-12-20 04:44:58 +00:00
Akira Hatanaka
e0e871529a [mips] Refactor SLT (set on less than) instructions. Separate encoding 
information from the rest. 

llvm-svn: 170664
 2012-12-20 04:27:52 +00:00
Akira Hatanaka
0c5b53d93f [mips] Refactor unconditional branch instruction. Separate encoding information 
from the rest. 

llvm-svn: 170663
 2012-12-20 04:22:39 +00:00
Akira Hatanaka
9ed2d54e79 [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass 
parameter.

llvm-svn: 170661
 2012-12-20 04:20:09 +00:00
Akira Hatanaka
1b980a0268 [mips] Delete definition of CPRESTORE instruction. 
llvm-svn: 170660
 2012-12-20 04:15:30 +00:00
Akira Hatanaka
3266206836 [mips] Refactor conditional branch instructions with one register operand. 
Separate encoding information from the rest.

llvm-svn: 170659
 2012-12-20 04:13:23 +00:00
Richard Smith
93dba2902c Don't use isa<CallInst>(this) in the constructor for CallInst's base class. 
This has undefined behavior, because the classof implementation attempts to
access parts of the not-yet-constructed derived class. Found by clang
-fsanitize=vptr.

llvm-svn: 170658
 2012-12-20 04:11:02 +00:00
Akira Hatanaka
654c74a52d [mips] Refactor conditional branch instructions with two register operands. 
Separate encoding information from the rest.

llvm-svn: 170657
 2012-12-20 04:10:13 +00:00
Reed Kotler
a14be76b3b fix most of remaining issues with large frames. 
these patches are tested a lot by test-suite but
make check tests are forthcoming once the next
few patches that complete this are committed.
with the next few patches the pass rate for mips16 is
near 100%

llvm-svn: 170656
 2012-12-20 04:07:42 +00:00
Akira Hatanaka
5b153fc53a [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy 
physical register $r1 to $r0.

GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.

Original patch by Reed Kotler.

llvm-svn: 170655
 2012-12-20 04:06:06 +00:00
Richard Smith
7078d1c0bb Fix use-before-construction of X86TargetLowering. 
llvm-svn: 170654
 2012-12-20 04:04:17 +00:00
Richard Smith
b5bb001e95 Don't use -1 as a value of an unsigned 7-bit enumeration; that has undefined 
behavior and violates the !range constraints we put on loads of this enum.
Found by clang -fsanitize=enum.

llvm-svn: 170653
 2012-12-20 04:02:58 +00:00
Akira Hatanaka
4661f12a89 [mips] Change the order of template parameters. Move the default parameters to 
the end. 

llvm-svn: 170651
 2012-12-20 03:52:08 +00:00
Akira Hatanaka
06f2007a02 [mips] Refactor shift instructions with register operands. Separate encoding 
information from the rest.

llvm-svn: 170650
 2012-12-20 03:48:24 +00:00
Akira Hatanaka
c627c88fc5 [mips] Refactor shift immediate instructions. Separate encoding information 
from the rest.

llvm-svn: 170649
 2012-12-20 03:44:41 +00:00