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8 Commits

Author SHA1 Message Date
Jyotsna Verma
c096fbaa7d Hexagon: Add encoding bits to the TFR64 instructions. 
Set imMoveImm, isAsCheapAsAMove flags for TFRI instructions.

llvm-svn: 176499
 2013-03-05 18:42:28 +00:00
Jyotsna Verma
84136133e3 Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h. 
Add HexagonMCInst class which adds various Hexagon VLIW annotations.
In addition, this class also includes some APIs related to the
constant extenders.

llvm-svn: 175634
 2013-02-20 16:13:27 +00:00
Jyotsna Verma
c8d145f6f6 Use multiclass to define store instructions with base+immediate offset 
addressing mode and immediate stored value.

llvm-svn: 169408
 2012-12-05 19:32:03 +00:00
Brendon Cahoon
8b14ad918f Revert 156634 upon request until code improvement changes are made. 
llvm-svn: 156775
 2012-05-14 19:35:42 +00:00
Brendon Cahoon
90dddafa44 Hexagon constant extender support. 
Patch by Jyotsna Verma.

llvm-svn: 156634
 2012-05-11 19:56:59 +00:00
Sirish Pande
253d16b1b0 Support for target dependent Hexagon VLIW packetizer. 
This patch creates and optimizes packets as per Hexagon ISA rules.

llvm-svn: 156109
 2012-05-03 21:52:53 +00:00
Chandler Carruth
9460759e4f Revert r155365, r155366, and r155367. All three of these have regression 
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

llvm-svn: 155372
 2012-04-23 18:25:57 +00:00
Sirish Pande
2230f1957e Support for Hexagon VLIW Packetizer. 
llvm-svn: 155365
 2012-04-23 17:49:20 +00:00