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75 Commits

Author SHA1 Message Date
Evan Cheng
8464a0bf00 Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether 
the stored register is killed.

llvm-svn: 44600
 2007-12-05 03:14:33 +00:00
Evan Cheng
58b387dfb0 Remove redundant foldMemoryOperand variants and other code clean up. 
llvm-svn: 44517
 2007-12-02 08:30:39 +00:00
Dale Johannesen
5fd9e7a615 Add parameter to getDwarfRegNum to permit targets 
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.

llvm-svn: 44056
 2007-11-13 19:13:01 +00:00
Anton Korobeynikov
8e8473c783 Use TableGen to emit information for dwarf register numbers. 
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997
 2007-11-11 19:50:10 +00:00
Evan Cheng
0449186690 - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding. 
- Fix some copy+paste bugs.

llvm-svn: 43153
 2007-10-18 22:40:57 +00:00
Evan Cheng
c852780685 Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface. 
llvm-svn: 43150
 2007-10-18 21:29:24 +00:00
Evan Cheng
f536e2f41e - Added a few target hooks to generate load / store instructions from / to any 
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.

llvm-svn: 42621
 2007-10-05 01:32:41 +00:00
Evan Cheng
5f9e291240 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!

llvm-svn: 42346
 2007-09-26 06:25:56 +00:00
Anton Korobeynikov
5635277c36 Long live the exception handling! 
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.

In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.

After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be 
thought as 'finished': I expect many small and not so small glitches
everywhere.

llvm-svn: 39855
 2007-07-14 14:06:15 +00:00
Evan Cheng
e47ec4d104 eliminateFrameIndex() change. 
llvm-svn: 36626
 2007-05-01 09:13:03 +00:00
Anton Korobeynikov
f3e62a428a Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Evan Cheng
41f4f032ee Added MRegisterInfo hook to re-materialize an instruction. 
llvm-svn: 35205
 2007-03-20 08:09:38 +00:00
Evan Cheng
116f97f2c7 PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
llvm-svn: 34707
 2007-02-28 00:21:17 +00:00
Evan Cheng
da51cf986a By default, spills kills the register being stored. 
llvm-svn: 34515
 2007-02-23 01:10:04 +00:00
Jim Laskey
6a937ad320 Support to provide exception and selector registers. 
llvm-svn: 34482
 2007-02-21 22:54:50 +00:00
Evan Cheng
e4ab9c032b Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
llvm-svn: 34428
 2007-02-19 21:49:54 +00:00
Reid Spencer
b27fcf3482 For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
 2007-02-19 03:20:00 +00:00
Evan Cheng
8c2508f1ac Added getReservedRegs(). 
llvm-svn: 34376
 2007-02-17 11:06:00 +00:00
Evan Cheng
b6a4a7f72a PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. 
llvm-svn: 33460
 2007-01-23 09:38:11 +00:00
Evan Cheng
d9d93832b0 hasFP() is now a virtual method of MRegisterInfo. 
llvm-svn: 33455
 2007-01-23 00:57:47 +00:00
Evan Cheng
bd6a333b52 Fix naming inconsistency. 
llvm-svn: 32823
 2007-01-02 21:33:40 +00:00
Bill Wendling
f13d78d3b8 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.

llvm-svn: 31947
 2006-11-27 23:37:22 +00:00
Evan Cheng
2a92afa25d Properly transfer kill / dead info. 
llvm-svn: 31765
 2006-11-15 20:58:11 +00:00
Evan Cheng
0e82270ff2 Matches MachineInstr changes. 
llvm-svn: 31712
 2006-11-13 23:36:35 +00:00
Chris Lattner
13ae6835d9 silence warnings. 
llvm-svn: 31394
 2006-11-03 01:18:29 +00:00
Andrew Lenharth
92b6c807c7 more shotenning 
llvm-svn: 31331
 2006-10-31 23:46:56 +00:00
Chris Lattner
9cd4e3429e Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.

llvm-svn: 30109
 2006-09-05 02:31:13 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks! 
llvm-svn: 29756
 2006-08-17 22:00:08 +00:00
Andrew Lenharth
fe127f3de7 Let the alpha breakage begin. First Formals and RET. next Calls 
llvm-svn: 28753
 2006-06-12 18:09:24 +00:00
Evan Cheng
667b133ab9 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
llvm-svn: 28378
 2006-05-18 00:12:58 +00:00
Andrew Lenharth
595187964b Fix call_adj.ll 
llvm-svn: 28360
 2006-05-17 19:24:49 +00:00
Chris Lattner
685568510a Move some methods out of MachineInstr into MachineOperand 
llvm-svn: 28102
 2006-05-04 17:52:23 +00:00
Chris Lattner
97f1af2f14 There shalt be only one "immediate" operand type! 
llvm-svn: 28099
 2006-05-04 17:21:20 +00:00
Chris Lattner
c779fca289 Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Jim Laskey
b93bc75add Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly. 
llvm-svn: 27225
 2006-03-28 13:48:33 +00:00
Jim Laskey
8688957c53 Translate llvm target registers to dwarf register numbers properly. 
llvm-svn: 27180
 2006-03-27 20:18:45 +00:00
Jim Laskey
cec9c18c62 Add support to locate local variables in frames (early version.) 
llvm-svn: 26994
 2006-03-23 18:12:57 +00:00
Chris Lattner
e93eeb189f remove some now-dead code 
llvm-svn: 26652
 2006-03-09 18:07:49 +00:00
Chris Lattner
15cb732cd7 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
llvm-svn: 25913
 2006-02-02 20:12:32 +00:00
Andrew Lenharth
9812806d03 Add immediate forms of cmov and remove some cruft 
llvm-svn: 25882
 2006-02-01 19:37:33 +00:00
Andrew Lenharth
ad88ba7c98 allow R28 to be used for frame calculations without entirely removing it from circulation 
llvm-svn: 25639
 2006-01-26 03:22:07 +00:00
Andrew Lenharth
3b1babbf44 maintaining stackpointer alignment. Perhaps it doesn't matter 
llvm-svn: 25592
 2006-01-25 01:51:08 +00:00
Andrew Lenharth
1f84cd6920 clean this function up some 
llvm-svn: 25055
 2006-01-01 22:13:54 +00:00
Andrew Lenharth
1acb71df32 whatever. Intermediate patch to see what breaks. Seems ok. 
llvm-svn: 24260
 2005-11-09 19:17:08 +00:00
Andrew Lenharth
a7554852b3 ret 0; works, not much else 
still lots of uglyness.
Maybe calls will come soon.
Fixing the return value of things will be necessary to make alpha work.

llvm-svn: 23832
 2005-10-20 00:28:31 +00:00
Andrew Lenharth
bfa54fe229 This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out 
llvm-svn: 23676
 2005-10-09 20:11:35 +00:00
Chris Lattner
a1266f8ed5 Pass extra regclasses into spilling code 
llvm-svn: 23537
 2005-09-30 01:29:42 +00:00
Chris Lattner
b46e525e23 This code has always been dead for alpha 
llvm-svn: 22915
 2005-08-19 18:33:26 +00:00