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Commit Graph

17 Commits

Author SHA1 Message Date
Dan Gohman
bab393fdff For post-regalloc scheduling, remove the instructions from the block
before re-inserting them.

llvm-svn: 59281
2008-11-14 00:33:17 +00:00
Dan Gohman
f92f2d0c97 Initial support for carrying MachineInstrs in SUnits.
llvm-svn: 59278
2008-11-14 00:06:09 +00:00
Dan Gohman
0a3ae5c0f2 Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.

The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.

llvm-svn: 59273
2008-11-13 23:24:17 +00:00
Dan Gohman
0cefa8f2ff Make the Node member of SUnit private, and add accessors.
llvm-svn: 59264
2008-11-13 21:36:12 +00:00
Dan Gohman
df9f75e981 Change ScheduleDAG's DAG member from a reference to a pointer, to prepare
for the possibility of scheduling without a SelectionDAG being present.

llvm-svn: 59263
2008-11-13 21:21:28 +00:00
Dale Johannesen
bc29bec7f8 Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
2008-09-24 01:07:17 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
2008-09-17 21:13:11 +00:00
Evan Cheng
6cfbecd1fa When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
llvm-svn: 56258
2008-09-16 23:12:11 +00:00
Bill Wendling
932818c75a Reverting r56249. On further investigation, this functionality isn't needed.
Apologies for the thrashing.

llvm-svn: 56251
2008-09-16 21:48:12 +00:00
Bill Wendling
1a240c8033 - Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249
2008-09-16 21:12:30 +00:00
Dan Gohman
082879cfde Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.

This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.

It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.

It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.

llvm-svn: 56162
2008-09-12 18:08:03 +00:00
Dale Johannesen
6395da3510 Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161
2008-09-12 17:49:03 +00:00
Dan Gohman
89660301e3 Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.

llvm-svn: 56159
2008-09-12 16:56:44 +00:00
Dan Gohman
85d35b92df Move the code that inserts copies for function livein registers
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.

llvm-svn: 55863
2008-09-05 22:59:21 +00:00
Dan Gohman
13d7484b4a Revert r55817. It broke PIC. FastISel will need to find a different
approach here.

llvm-svn: 55842
2008-09-05 18:13:01 +00:00
Dan Gohman
fcd2cbd985 In FastISel mode, the scheduler may be invoked multiple times
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.

llvm-svn: 55817
2008-09-05 01:07:48 +00:00
Dan Gohman
c58897359b Separate MachineInstr-emitting routines from actual scheduling
routines and move them into a separate file, ScheduleDAGEmit.cpp.

llvm-svn: 55699
2008-09-03 16:01:59 +00:00