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Commit Graph

36 Commits

Author SHA1 Message Date
Dale Johannesen
b9e1a37497 Cosmetics.
llvm-svn: 47168
2008-02-15 18:40:53 +00:00
Dale Johannesen
de53aaec39 Remove warning about 64-bit code on processor
that doesn't support it.  Per Chris.

llvm-svn: 47162
2008-02-15 18:09:51 +00:00
Dale Johannesen
6cb8a628a2 Rewrite tblgen handling of subtarget features so
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to.  Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.

llvm-svn: 47143
2008-02-14 23:35:16 +00:00
Duncan Sands
6f28b87039 Use size_t to store Pos, avoid truncating value
on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

llvm-svn: 45746
2008-01-08 10:06:15 +00:00
Chris Lattner
abd12447f8 leopard and above support alignment for common symbols.
llvm-svn: 45493
2008-01-02 19:35:16 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Gabor Greif
5f705671e4 Here is the bulk of the sanitizing.
Almost all occurrences of "bytecode" in the sources have been eliminated.

llvm-svn: 37913
2007-07-05 17:07:56 +00:00
Reid Spencer
19af04a142 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
confusion with external linkage types.

llvm-svn: 33663
2007-01-30 20:08:39 +00:00
Bill Wendling
efde03bbf6 Instead of yet another enum indicating the "assembly language flavor",
just use the one that's in the subtarget.

llvm-svn: 33255
2007-01-16 09:29:17 +00:00
Chris Lattner
fb4898fdd8 Another step forward in PPC64 JIT support: we now no-longer need stubs
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).

This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.

llvm-svn: 32451
2006-12-11 23:22:45 +00:00
Bill Wendling
f13d78d3b8 What should be the last unnecessary <iostream>s in the library.
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
Chris Lattner
f022962081 Remove what little AIX support we have. It has never been tested and isn't
complete.

llvm-svn: 29156
2006-07-15 01:24:23 +00:00
Chris Lattner
59947dda25 Force 64-bit register availability in 64-bit mode. For real.
llvm-svn: 28837
2006-06-16 20:05:06 +00:00
Chris Lattner
126464b577 Remove the -darwin and -aix llc options, inferring darwinism and aixism from
the target triple & subtarget info.  woo.

llvm-svn: 28835
2006-06-16 18:50:48 +00:00
Chris Lattner
19680a4928 Document the subtarget features better, make sure that 64-bit mode, 64-bit
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)

llvm-svn: 28825
2006-06-16 17:50:12 +00:00
Chris Lattner
fa884ac11b Rename some subtarget features. A CPU now can *have* 64-bit instructions,
can in 32-bit mode we can choose to optionally *use* 64-bit registers.

llvm-svn: 28824
2006-06-16 17:34:12 +00:00
Chris Lattner
aeb5a015cd First baby step towards ppc64 support. This adds a new -march=ppc64 backend
that is currently just like ppc32 :)

llvm-svn: 28813
2006-06-16 01:37:27 +00:00
Chris Lattner
137c02aa60 Compile this:
void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.

llvm-svn: 26447
2006-03-01 05:50:56 +00:00
Evan Cheng
305141c1ba - Added option -relocation-model to set relocation model. Valid values include static, pic,
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
2006-02-22 20:19:42 +00:00
Chris Lattner
170727421b add a note about how we should implement this FIXME from the legalizer:
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.

llvm-svn: 25733
2006-01-28 05:40:47 +00:00
Chris Lattner
b6af6ea0d4 add an option to generate completely non-pic code, corresponding to what
gcc -static produces on PPC.  This is used for building kexts and other things.

With this, materializing the address of a global looks like:

        lis r2, ha16(L_H$non_lazy_ptr)
        la r3, lo16(L_H$non_lazy_ptr)(r2)

we're still emitting stubs for functions, which is wrong.  That is next.

llvm-svn: 24399
2005-11-17 18:55:48 +00:00
Jim Laskey
4cb1e29b27 Allow itineraries to be passed through the Target Machine.
llvm-svn: 24139
2005-11-01 20:06:59 +00:00
Jim Laskey
9ce53d8411 Give full control of subtarget features over to table generated code.
llvm-svn: 24013
2005-10-26 17:30:34 +00:00
Jim Laskey
b377b32a58 Preparation of supporting scheduling info. Need to find info based on selected
CPU.

llvm-svn: 23974
2005-10-25 15:15:28 +00:00
Chris Lattner
5d6f12bbde Simplify this, matching changes in the tblgen emitter
llvm-svn: 23909
2005-10-23 22:34:25 +00:00
Jim Laskey
1fbdee408d Plugin new subtarget backend into the build.
llvm-svn: 23870
2005-10-21 19:05:19 +00:00
Nate Begeman
5dbcab491a Do the right thing and enable 64 bit regs under the control of a subtarget
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.

llvm-svn: 23779
2005-10-18 00:56:42 +00:00
Chris Lattner
0405f3388f Rename PowerPC*.h to PPC*.h
llvm-svn: 23743
2005-10-14 23:51:18 +00:00
Chris Lattner
617b26ddd7 On non-apple systems, when using -march=ppc32, do not print:
'' is not a recognized processor for this target (ignoring processor)

Default to "generic" instead of "" for the default CPU.

llvm-svn: 23257
2005-09-07 05:45:33 +00:00
Nate Begeman
f1994fa030 Add accessor for 64bit flag, so that we can tell when it is safe to
generate the fun in-register fp<->long instructions.

llvm-svn: 23244
2005-09-06 15:30:12 +00:00
Jim Laskey
1f9c40400c Add help support for -mcpu and -mattr.
llvm-svn: 23222
2005-09-02 19:27:43 +00:00
Chris Lattner
813a73e8e9 Decouple fsqrt from gpul optimizations, implementing fsqrt.ll.
Remove the -enable-gpopt option which is subsumed by feature flags.

llvm-svn: 23218
2005-09-02 18:33:05 +00:00
Jim Laskey
f32ef9a37f 1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
2005-09-01 21:38:21 +00:00
Chris Lattner
93820f4ad7 Consolidate the GPOpt stuff to all use the Subtarget, instead of still
depending on the command line option.  Now the command line option just
sets the subtarget as appropriate.  G5 opts will now default to on on
G5-enabled nightly testers among other machines.

llvm-svn: 22688
2005-08-05 22:05:03 +00:00
Chris Lattner
79095d3416 Enable gp optimizations by default when available, even when a target triple
is available, since the target triple doesn't specify whether to use gpopts
or not.

llvm-svn: 22685
2005-08-05 21:25:13 +00:00
Nate Begeman
09997f1012 Add Subtarget support to PowerPC. Next up, using it.
llvm-svn: 22644
2005-08-04 07:12:09 +00:00