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34086 Commits

Author SHA1 Message Date
Roman Tereshin
619c8d7968 [GlobalISel] Reporting rules covered as part of the InstructionSelect's debug-only printing
The main goal of this change is to make it much easier to track which
rules are actually covered by Testgen'erated regression tests.

Reviewers: aemerson, dsanders

Differential Revision: https://reviews.llvm.org/D46095

llvm-svn: 330988
2018-04-26 20:22:17 +00:00
Sam Clegg
14655b5aa9 [WebAssembly] Write DWARF data into wasm object file
- Writes ".debug_XXX" into corresponding custom sections.
- Writes relocation records into "reloc.debug_XXX" sections.

Patch by Yury Delendik!

Differential Revision: https://reviews.llvm.org/D44184

llvm-svn: 330982
2018-04-26 19:27:28 +00:00
Sam Clegg
33666d525d [WebAssembly] Add version to object file metadata
Summary: See https://github.com/WebAssembly/tool-conventions/issues/54

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46069

llvm-svn: 330969
2018-04-26 18:15:32 +00:00
Matthew Simpson
0ecc1283b2 [TTI, AArch64] Add transpose shuffle kind
This patch adds a new shuffle kind useful for transposing a 2xn matrix. These
transpose shuffle masks read corresponding even- or odd-numbered vector
elements from two n-dimensional source vectors and write each result into
consecutive elements of an n-dimensional destination vector. The transpose
shuffle kind is meant to model the TRN1 and TRN2 AArch64 instructions. As such,
this patch also considers transpose shuffles in the AArch64 implementation of
getShuffleCost.

Differential Revision: https://reviews.llvm.org/D45982

llvm-svn: 330941
2018-04-26 13:48:33 +00:00
Sander de Smalen
d581504a2a [AsmMatcher] Extend PredicateMethod with optional DiagnosticPredicate
An optional, light-weight and backward-compatible mechanism to allow
specifying that a diagnostic _only_ applies to a partial mismatch (NearMiss),
rather than a full mismatch.

Patch [1/2] in a series to improve assembler diagnostics for SVE.
-  Patch [1/2]: https://reviews.llvm.org/D45879
-  Patch [2/2]: https://reviews.llvm.org/D45880

Reviewers: olista01, stoklund, craig.topper, mcrosier, rengolin, echristo, fhahn, SjoerdMeijer, evandro, javed.absar

Reviewed By: olista01

Differential Revision: https://reviews.llvm.org/D45879

llvm-svn: 330930
2018-04-26 09:24:45 +00:00
Reid Kleckner
f347a3040c [codeview] Ignore .cv_loc directives at the end of a function
If no data or instructions are emitted after a location directive, we
should clear the cv_loc when we change sections, or it will be emitted
at the beginning of the next section. This violates our invariant that
all .cv_loc directives belong to the same section. Add clearer
assertions for this.

llvm-svn: 330884
2018-04-25 23:34:15 +00:00
Vedant Kumar
a042bc0c1b [ADT] Make filter_iterator support bidirectional iteration
This makes it possible to reverse a filtered range. For example, here's
a way to visit memory accesses in a BasicBlock in reverse order:

    auto MemInsts = reverse(make_filter_range(BB, [](Instruction &I) {
      return isa<StoreInst>(&I) || isa<LoadInst>(&I);
    }));

    for (auto &MI : MemInsts)
      ...

To implement this functionality, I factored out forward iteration
functionality into filter_iterator_base, and added a specialization of
filter_iterator_impl which supports bidirectional iteration. Thanks to
Tim Shen, Zachary Turner, and others for suggesting this design and
providing feedback! This version of the patch supersedes the original
(https://reviews.llvm.org/D45792).

This was motivated by a problem we encountered in D45657: we'd like to
visit the non-debug-info instructions in a BasicBlock in reverse order.

Testing: check-llvm, check-clang

Differential Revision: https://reviews.llvm.org/D45853

llvm-svn: 330875
2018-04-25 21:50:09 +00:00
Tom Stellard
dfa11ced56 AMDGPU/R600: Move int_r600_store_stream_output to the public intrinsic file
Summary:
The TableGen'd GlobalISel instruction selector assumes all intrinsics are in
the public Intrinsic:: namespace.

Reviewers: jvesely, nhaehnle

Reviewed By: jvesely, nhaehnle

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45989

llvm-svn: 330866
2018-04-25 20:02:53 +00:00
David Bolvansky
26d59be83d [SimplifyLibcalls] Atoi, strtol replacements
Reviewers: spatel, lebedev.ri, xbolva00, efriedma

Reviewed By: xbolva00, efriedma

Subscribers: efriedma, llvm-commits

Differential Revision: https://reviews.llvm.org/D45418

llvm-svn: 330860
2018-04-25 18:58:53 +00:00
Francis Visoiu Mistrih
73884955f2 [MIR] Add support for debug metadata for fixed stack objects
Debug var, expr and loc were only supported for non-fixed stack objects.

This patch adds the following fields to the "fixedStack:" entries, and
renames the ones from "stack:" to:

* debug-info-variable
* debug-info-expression
* debug-info-location

Differential Revision: https://reviews.llvm.org/D46032

llvm-svn: 330859
2018-04-25 18:58:06 +00:00
Sam Clegg
1c9ece735b [WebAssebmly] Add Module name to WasmSymbol
Imports in a wasm module can have custom module name.  This change
adds the module name to the WasmSymbol structure so that the linker
can preserve this module name.

This is needed to fix: https://bugs.llvm.org/show_bug.cgi?id=37168

Differential Revision: https://reviews.llvm.org/D45797

llvm-svn: 330854
2018-04-25 18:24:08 +00:00
Nico Weber
4377f43d2b Rename Attributes.gen, Intrinsics.gen to Attributes.inc, Intrinsics.inc
Virtually all other tablegen outputs are called .inc, not .gen, so rename these two too for consistency.
No behavior change.

https://reviews.llvm.org/D46058

llvm-svn: 330843
2018-04-25 17:07:46 +00:00
Paul Walker
688c9ab1a3 Fix typo in static_assert for size of LoadSDNodeBitfields.
Reviewers: fhahn, jlebar, delena, RKSimon

Reviewed By: fhahn, jlebar

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45769

llvm-svn: 330830
2018-04-25 14:42:44 +00:00
Warren Ristow
d952afa83a [X86] Account for partial stack slot spills (PR30821)
Previously, _any_ store or load instruction was considered to be
operating on a spill if it had a frameindex as an operand, and thus
was fair game for optimisations such as "StackSlotColoring". This
usually works, except on architectures where spills can be partially
restored, for example on X86 where a spilt vector can have a single
component loaded (zeroing the rest of the target register). This can be
mis-interpreted and the zero extension unsoundly eliminated, see
pr30821.

To avoid this, this commit optionally provides the caller to
isLoadFromStackSlot and isStoreToStackSlot with the number of bytes
spilt/loaded by the given instruction. Optimisations can then determine
that a full spill followed by a partial load (or vice versa), for
example, cannot necessarily be commuted.

Patch by Jeremy Morse!

Differential Revision: https://reviews.llvm.org/D44782

llvm-svn: 330778
2018-04-24 22:01:50 +00:00
Reid Kleckner
1df08a9be7 Bring back APInt self-move assignment check for MSVC only
Summary:
It was removed about a year ago in r300477. Bring it back, along with
its unittest, when the MSVC STL is in use. The MSVC STL performs
self-assignment in std::shuffle. These days, llvm::sort calls
std::shuffle when expensive checks are enabled to help find
non-determinism bugs.

Reviewers: craig.topper, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D46028

llvm-svn: 330776
2018-04-24 21:41:50 +00:00
Daniel Neilson
66dd709dc3 [CaptureTracking] Fixup const correctness of DomTree arg (NFC)
Summary:
The PointerMayBeCapturedBefore function's DomTree arg should be
const instead of non-const. There are no non-const uses of it
in the function.

llvm-svn: 330769
2018-04-24 21:12:45 +00:00
Sam McCall
d55fa2c558 [Support] fix countLeadingZeros for types shorter than int
llvm-svn: 330762
2018-04-24 20:08:05 +00:00
Sam Clegg
7ccbb03639 [WebAssembly] Use section index in relocation section header
Rather than referring to sections my their code, use the
absolute index of the target section within the module.

See https://github.com/WebAssembly/tool-conventions/issues/52

Differential Revision: https://reviews.llvm.org/D45980

llvm-svn: 330749
2018-04-24 18:11:36 +00:00
Diego Caballero
6f85fab6b9 [LV][VPlan] Detect outer loops for explicit vectorization.
Patch #2 from VPlan Outer Loop Vectorization Patch Series #1
(RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html).

This patch introduces the basic infrastructure to detect, legality check
and process outer loops annotated with hints for explicit vectorization.
All these changes are protected under the feature flag
-enable-vplan-native-path. This should make this patch NFC for the existing
inner loop vectorizer.

Reviewers: hfinkel, mkuper, rengolin, fhahn, aemerson, mssimpso.

Differential Revision: https://reviews.llvm.org/D42447

llvm-svn: 330739
2018-04-24 17:04:17 +00:00
Fangrui Song
f940341873 [ADT] Remove ilist_default_traits
llvm-svn: 330736
2018-04-24 16:32:55 +00:00
David Blaikie
ba3ab1b76a Fix some layering in AggressiveInstCombine (avoiding inclusion of Scalar.h)
llvm-svn: 330726
2018-04-24 15:40:07 +00:00
Simon Pilgrim
cf35a2cfd3 Fix Wdocumentation warnings. NFCI.
llvm-svn: 330716
2018-04-24 13:38:26 +00:00
Simon Pilgrim
c8e4fc2a95 [MC] Remove orphan MCSchedModel::computeReciprocalThroughput declaration. NFCI.
llvm-svn: 330713
2018-04-24 13:01:03 +00:00
Petar Jovanovic
9686e666ef Correct dwarf unwind information in function epilogue
This patch aims to provide correct dwarf unwind information in function
epilogue for X86.
It consists of two parts. The first part inserts CFI instructions that set
appropriate cfa offset and cfa register in emitEpilogue() in
X86FrameLowering. This part is X86 specific.

The second part is platform independent and ensures that:

* CFI instructions do not affect code generation (they are not counted as
  instructions when tail duplicating or tail merging)
* Unwind information remains correct when a function is modified by
  different passes. This is done in a late pass by analyzing information
  about cfa offset and cfa register in BBs and inserting additional CFI
  directives where necessary.

Added CFIInstrInserter pass:

* analyzes each basic block to determine cfa offset and register are valid
  at its entry and exit
* verifies that outgoing cfa offset and register of predecessor blocks match
  incoming values of their successors
* inserts additional CFI directives at basic block beginning to correct the
  rule for calculating CFA

Having CFI instructions in function epilogue can cause incorrect CFA
calculation rule for some basic blocks. This can happen if, due to basic
block reordering, or the existence of multiple epilogue blocks, some of the
blocks have wrong cfa offset and register values set by the epilogue block
above them.
CFIInstrInserter is currently run only on X86, but can be used by any target
that implements support for adding CFI instructions in epilogue.

Patch by Violeta Vukobrat.

Differential Revision: https://reviews.llvm.org/D42848

llvm-svn: 330706
2018-04-24 10:32:08 +00:00
Florian Hahn
99ad998128 [LoopInfo] Verify BBMap tracks innermost loops for BBs.
By checking that none of the child loops contain a BB we make sure BBMap
contains the innermost loop defining BB. This invariant was violated in
LoopInterchange and got caught by this assertion.

Reviewers: chandlerc, mzolotukhin, sanjoy, mehdi_amini, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45971

llvm-svn: 330698
2018-04-24 09:10:05 +00:00
David Blaikie
798d5239e3 InstCombine: Fix layering by not including Scalar.h in InstCombine
(notionally Scalar.h is part of libLLVMScalarOpts, so it shouldn't be
included by InstCombine which doesn't/shouldn't need to depend on
ScalarOpts)

llvm-svn: 330669
2018-04-24 00:48:59 +00:00
Craig Topper
0a4050d2c1 [AggressiveInstCombine] Add aggressive inst combiner to the LLVM C API.
I just tried to copy what was done for regular InstCombine. Hopefully I didn't miss anything.

llvm-svn: 330668
2018-04-24 00:39:29 +00:00
Craig Topper
9799a116cf [AggressiveInstCombine] Add createAggressiveInstCombinerPass to LinkAllPasses.h.
llvm-svn: 330664
2018-04-24 00:11:04 +00:00
Craig Topper
8249a0af04 [AggressiveInstCombine] Add library initializer routine for AggressiveInstCombine library. Use it in bugpoint and llvm-opt-fuzzer to match regular InstCombine.
This should make aggressive instcombine usable with these tools.

llvm-svn: 330663
2018-04-24 00:05:21 +00:00
Robert Widmann
fa09f428c1 [LLVM-C] DIBuilder Bindings For Variable Expressions
Summary: Add DIBuilder bindings for (global) variable expressions, variable value expressions, and debug value intrinsic insertion.

Reviewers: harlanhaskins, deadalnix, whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45979

llvm-svn: 330661
2018-04-23 22:31:49 +00:00
Roman Tereshin
68a9fbd154 [GlobalISel][Legalizer] Look thro copies while combining G_UNMERGE's
As we're becoming stricter w/ respect to not allowing vregs having LLTs
and regclasses assigned both mid-globalisel pipeline, the number of
extra copies grows, some of which separate G_UNMERGE's from their
corresponding G_MERGE's, becoming a performance concern.

It's worth mentioning that we're already looking through copies while
combining legalization artifacts for every kind of artifact but
G_UNMERGE.

Reviewed By: aditya_nandakumar

Reviewers: ab, t.p.northover, volkan, javed.absar

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45644

llvm-svn: 330660
2018-04-23 22:28:36 +00:00
Gabor Buella
9c90e6f6a7 [X86] Revert r330638 - accidental commit
llvm-svn: 330640
2018-04-23 20:05:51 +00:00
George Burgess IV
c30e414a19 Fix a broken typedef; NFCI
Richard Smith noted that `typedef typename iplist::iplist_impl_type
iplist_impl_type` is incorrect, per
http://eel.is/c++draft/basic.scope#class-2

It seems that neither clang nor gcc get too angry about this, but a
newer version of msvc does.

Thanks to jcmac on IRC for pointing this out!

llvm-svn: 330639
2018-04-23 20:03:00 +00:00
Gabor Buella
8b59c3cd73 [X86] movdiri and movdir64b instructions
Reviewers: craig.topper
llvm-svn: 330638
2018-04-23 20:00:59 +00:00
Daniel Neilson
20550447c7 [DSE] Teach the pass that atomic memory intrinsics are stores.
Summary:
This change teaches DSE that the atomic memory intrinsics are stores
that can be eliminated, and can allow other stores to be eliminated.
This change specifically does not teach DSE that these intrinsics
can be partially eliminated (i.e. length reduced, and dest/src changed);
that will be handled in another change.

Reviewers: mkazantsev, skatkov, apilipenko, efriedma, rsmith

Reviewed By: efriedma

Subscribers: dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D45535

llvm-svn: 330629
2018-04-23 19:06:49 +00:00
Simon Pilgrim
aee61b4ff9 [MC] Remove MachineInstr reference in MC layer (PR37160)
Only add support for getSchedInfoStr(const MachineInstr &MI) at the TargetSubtargetInfo level.

Really, the getSchedInfoStr calls need to be removed entirely, we should just return a latency/rthroughput through the subtarget and keep a string creation helper function somewhere else.

llvm-svn: 330615
2018-04-23 16:59:06 +00:00
Daniel Neilson
90b8483e64 [SelectionDAG] Refactor lowering of atomic memory intrinsics.
Summary:
This just refactors the lowering of the atomic memory intrinsics to more
closely match the code patterns used in the lowering of the non-atomic
memory intrinsics. Specifically, we encapsulate the lowering in
SelectionDAG::getAtomicMem*() functions rather than embedding
the code directly in the SelectionDAGBuilder code.

llvm-svn: 330603
2018-04-23 15:40:37 +00:00
Robert Widmann
44ea8a8a00 [LLVM-C] DIBuilderBindings for Subrange and Arrays
Summary: Move Go bindings for subranges and DINode arrays.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45933

llvm-svn: 330594
2018-04-23 14:29:33 +00:00
Robert Widmann
c74871fc07 [LLVM-C] Finish Up Scope Bindings
Summary: Adds bindings for Module and NameSpace scopes and LLVMDIBuilderCreateForwardDecl, a counterpart to LLVMDIBuilderCreateReplaceableCompositeType.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45934

llvm-svn: 330591
2018-04-23 13:51:43 +00:00
Max Kazantsev
460e952639 [LoopSimplify] Fix incorrect SCEV invalidation
In the function `simplifyOneLoop` we optimistically assume that changes in the
inner loop only affect this very loop and have no impact on its parents. In fact,
after rL329047 has been merged, we can now calculate exit counts for outer
loops which may depend on inner loops. Thus, we need to invalidate all parents
when we do something to a loop.

There is an evidence of incorrect behavior of `simplifyOneLoop`: when we insert
`SE->verify()` check in the end of this funciton, it fails on a bunch of existing
test, in particular:

    LLVM :: Transforms/LoopUnroll/peel-loop-not-forced.ll
    LLVM :: Transforms/LoopUnroll/peel-loop-pgo.ll
    LLVM :: Transforms/LoopUnroll/peel-loop.ll
    LLVM :: Transforms/LoopUnroll/peel-loop2.ll

Note that previously we have fixed issues of this variety, see rL328483.
This patch makes this function invalidate the outermost loop properly.

Differential Revision: https://reviews.llvm.org/D45937
Reviewed By: chandlerc

llvm-svn: 330576
2018-04-23 10:32:37 +00:00
Robert Widmann
d3e65518df [LLVM-C] Add DIBuilder Bindings For Variable Creation
Summary: Wrap LLVMDIBuilderCreateAutoVariable, LLVMDIBuilderCreateParameterVariable, LLVMDIBuilderCreateExpression, and move and correct LLVMDIBuilderInsertDeclareBefore and LLVMDIBuilderInsertDeclareAtEnd from the Go bindings to the C bindings.

Reviewers: harlanhaskins, whitequark, deadalnix

Reviewed By: harlanhaskins, whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45928

llvm-svn: 330555
2018-04-22 19:24:44 +00:00
Andres Freund
e85d8ff3b7 Test commit access.
Remove trailing whitespace.

llvm-svn: 330551
2018-04-22 17:53:34 +00:00
Sanjay Patel
454315178c [PatternMatch] allow undef elements when matching a vector zero
This is the last step in getting constant pattern matchers to allow
undef elements in constant vectors.

I'm adding a dedicated m_ZeroInt() function and building m_Zero() from
that. In most cases, calling code can be updated to use m_ZeroInt()
directly when there's no need to match pointers, but I'm leaving that
efficiency optimization as a follow-up step because it's not always
clear when that's ok.

There are just enough icmp folds in InstSimplify that can be used for 
integer or pointer types, that we probably still want a generic m_Zero()
for those cases. Otherwise, we could eliminate it (and possibly add a
m_NullPtr() as an alias for isa<ConstantPointerNull>()).

We're conservatively returning a full zero vector (zeroinitializer) in
InstSimplify/InstCombine on some of these folds (see diffs in InstSimplify),
but I'm not sure if that's actually necessary in all cases. We may be 
able to propagate an undef lane instead. One test where this happens is 
marked with 'TODO'.
 

llvm-svn: 330550
2018-04-22 17:07:44 +00:00
Jonas Devlieghere
9bdd5c77dc [Support] Add optional prefix to convenience helpers in WithColor.
Several tools prefix the error/warning/note output with the name of the
tool. One such tool is LLD for example. This commit adds as an optional
'Prefix' argument to the convenience helpers.

llvm-svn: 330526
2018-04-21 21:36:11 +00:00
Eric Christopher
9e3701d460 Remove unused argument from emitModuleMetadata.
NFCI.

llvm-svn: 330470
2018-04-20 19:07:57 +00:00
Gabor Buella
f08c51f224 [X86] WaitPKG instructions
Three new instructions:

umonitor - Sets up a linear address range to be
monitored by hardware and activates the monitor.
The address range should be a writeback memory
caching type.

umwait - A hint that allows the processor to
stop instruction execution and enter an
implementation-dependent optimized state
until occurrence of a class of events.

tpause - Directs the processor to enter an
implementation-dependent optimized state
until the TSC reaches the value in EDX:EAX.

Also modifying the description of the mfence
instruction, as the rep prefix (0xF3) was allowed
before, which would conflict with umonitor during
disassembly.

Before:
$ echo 0xf3,0x0f,0xae,0xf0 | llvm-mc -disassemble
.text
mfence

After:
$ echo 0xf3,0x0f,0xae,0xf0 | llvm-mc -disassemble
.text
umonitor        %rax

Reviewers: craig.topper, zvi

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45253

llvm-svn: 330462
2018-04-20 18:42:47 +00:00
Zachary Turner
ae6e38e5af [LLD/PDB] Emit first section contribution for DBI Module Descriptor.
Part of the DBI stream is a list of variable length structures
describing each module that contributes to the final executable.

One member of this structure is a section contribution entry that
describes the first section contribution in the output file for
the given module.

We have been leaving this structure unpopulated until now, so with
this patch it is now filled out correctly.

Differential Revision: https://reviews.llvm.org/D45832

llvm-svn: 330457
2018-04-20 18:00:46 +00:00
Nicholas Wilson
0827c45cc6 [WebAssembly] Distinguish debug/symbol names in the Wasm structs. NFC
Differential Revision: https://reviews.llvm.org/D45021

llvm-svn: 330448
2018-04-20 17:07:24 +00:00
Sanjay Patel
093a966fb5 [DAGCombine] (float)((int) f) --> ftrunc (PR36617)
This was originally committed at rL328921 and reverted at rL329920 to
investigate failures in Chrome. This time I've added to the ReleaseNotes
to warn users of the potential of exposing UB and let me repeat that
here for more exposure:

  Optimization of floating-point casts is improved. This may cause surprising
  results for code that is relying on undefined behavior. Code sanitizers can
  be used to detect affected patterns such as this:

    int main() {
      float x = 4294967296.0f;
      x = (float)((int)x);
      printf("junk in the ftrunc: %f\n", x);
      return 0;
    }

    $ clang -O1 ftrunc.c -fsanitize=undefined ; ./a.out
    ftrunc.c:5:15: runtime error: 4.29497e+09 is outside the range of 
                   representable values of type 'int'
    junk in the ftrunc: 0.000000


Original commit message:

fptosi / fptoui round towards zero, and that's the same behavior as ISD::FTRUNC,
so replace a pair of casts with the equivalent node. We don't have to account for
special cases (NaN, INF) because out-of-range casts are undefined.

Differential Revision: https://reviews.llvm.org/D44909

llvm-svn: 330437
2018-04-20 15:07:55 +00:00
Michael Zolotukhin
ece1dc32fe Revert "Revert r330403 and r330413."
Reapply the patches with a fix. Thanks Ilya and Hans for the reproducer!
This reverts commit r330416.

The issue was that removing predecessors invalidated uses that we stored
for rewrite. The fix is to finish manipulating with CFG before we select
uses for rewrite.

llvm-svn: 330431
2018-04-20 13:34:32 +00:00