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14526 Commits

Author SHA1 Message Date
Jim Grosbach
6f00406f92 Tidy up formatting. 
llvm-svn: 141115
 2011-10-04 20:52:57 +00:00
Jim Grosbach
0db58d15e6 Un-XFAIL file. Fix incorrect CHECK lines. General format cleanup. 
llvm-svn: 141114
 2011-10-04 20:50:05 +00:00
Jim Grosbach
3df5c47ec8 Un-XFAIL file. Fix incorrect CHECK line. General format cleanup. 
llvm-svn: 141113
 2011-10-04 20:46:49 +00:00
Jim Grosbach
4770714494 Tidy up formatting. 
llvm-svn: 141111
 2011-10-04 20:42:35 +00:00
Jim Grosbach
dee6bd4517 Un-XFAIL file. Fix incorrect CHECK line. 
llvm-svn: 141110
 2011-10-04 20:42:09 +00:00
Jim Grosbach
d7449dd23f Un-XFAIL the file. Disable only the individual tests that aren't working yet. 
llvm-svn: 141108
 2011-10-04 20:34:11 +00:00
David Greene
10cf9ec1db Test Operand Arguments 
Add a test to do list manipulation and pass the result as arguments.
This tests the new list element operator resolve code and provides an
example of using list manipulation to do instruction pattern
substitution.

llvm-svn: 141102
 2011-10-04 18:55:40 +00:00
Jim Grosbach
58f067b61b Un-XFAIL the file. Disable only the individual tests that aren't working yet. 
llvm-svn: 141099
 2011-10-04 18:43:15 +00:00
Jim Grosbach
93ad98accb Tidy up. Formatting. 
llvm-svn: 141096
 2011-10-04 17:49:45 +00:00
David Dean
b0f6751041 Fix PR9833/PR11054 (patch provided by Patrik Hägglund) 
llvm-svn: 141092
 2011-10-04 16:26:41 +00:00
Craig Topper
9d32602cfd Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676. 
llvm-svn: 141065
 2011-10-04 06:30:42 +00:00
Andrew Trick
c60e2addd9 LSR should avoid redundant edge splitting. 
This handles the case in which LSR rewrites an IV user that is a phi and
splits critical edges originating from a switch.
Fixes <rdar://problem/6453893> LSR is not splitting edges "nicely"

llvm-svn: 141059
 2011-10-04 03:50:44 +00:00
Andrew Trick
f9b98a3c3e Unit test for r140919, loop unroll heuristics. 
llvm-svn: 141049
 2011-10-04 00:07:02 +00:00
Jim Grosbach
8170db143e Tidy up. These tests are covered in the .s file tests now. 
llvm-svn: 141047
 2011-10-03 23:40:13 +00:00
Jim Grosbach
f38874e79e ARM assembly parsing and encoding for VMOV immediate. 
llvm-svn: 141046
 2011-10-03 23:38:36 +00:00
Jim Grosbach
c69258c747 ARM parsing/encoding for VCMP/VCMPE. 
llvm-svn: 141038
 2011-10-03 22:30:24 +00:00
Akira Hatanaka
0a697c10ae Move CHECK after entry label. 
llvm-svn: 141030
 2011-10-03 21:24:30 +00:00
Akira Hatanaka
76c268271d Add support for 64-bit logical NOR. 
llvm-svn: 141029
 2011-10-03 21:23:18 +00:00
Akira Hatanaka
ae50204423 Add support for 64-bit count leading ones and zeros instructions. 
llvm-svn: 141028
 2011-10-03 21:16:50 +00:00
Jim Grosbach
21a9f8f50f ARM assembly parsing and encoding for VMRS/FMSTAT. 
llvm-svn: 141025
 2011-10-03 21:12:43 +00:00
Akira Hatanaka
6c6ff6fde7 Add support for 64-bit divide instructions. 
llvm-svn: 141024
 2011-10-03 21:06:13 +00:00
Jim Grosbach
0e385170ee Update test for 141010. 
llvm-svn: 141022
 2011-10-03 20:58:08 +00:00
Akira Hatanaka
e3c1d7eac0 Add support for 64-bit integer multiply instructions. 
llvm-svn: 141017
 2011-10-03 20:01:11 +00:00
Jim Grosbach
1651804363 Tidy up a bit. Formatting. 
llvm-svn: 141010
 2011-10-03 17:59:31 +00:00
Craig Topper
df04bee9b2 Add support for MOVBE and RDRAND instructions for the assembler and disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027. 
llvm-svn: 141007
 2011-10-03 17:28:23 +00:00
Rafael Espindola
4700f53cee Add the returns_twice attribute to LLVM. 
llvm-svn: 141001
 2011-10-03 14:45:37 +00:00
Craig Topper
4456c94f70 Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode. 
llvm-svn: 140997
 2011-10-03 08:14:29 +00:00
Craig Topper
a3372bd949 Test updates that were supposed to go with r140993. 
llvm-svn: 140994
 2011-10-03 07:53:59 +00:00
Nick Lewycky
4898eef762 Reapply r140979 with fix! We never did get a testcase, but careful review of the 
logic by David Meyer revealed this bug.

llvm-svn: 140992
 2011-10-03 07:10:45 +00:00
Torok Edwin
b7495041db attempt to fix ocaml bindings: landing pads 
llvm-svn: 140991
 2011-10-03 06:41:46 +00:00
Nick Lewycky
79fec8116f Revert r140979 due to reports of bootstrap failure. 
llvm-svn: 140980
 2011-10-03 05:14:59 +00:00
Nick Lewycky
a760a29395 Add one more case we compute a max trip count. 
llvm-svn: 140979
 2011-10-03 01:03:57 +00:00
Craig Topper
f776e3b410 Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. 
llvm-svn: 140974
 2011-10-02 21:08:12 +00:00
Craig Topper
5c8feca34f Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344. 
llvm-svn: 140971
 2011-10-02 16:56:09 +00:00
Nick Lewycky
7cd1bfb89d Add a new icmp+select optz'n. Also shows off the load(cst) folding added in 
r140966.

llvm-svn: 140969
 2011-10-02 10:37:37 +00:00
Craig Topper
43fd621df8 Fix disassembling of INVEPT and INVVPID to take operands 
llvm-svn: 140955
 2011-10-01 21:20:14 +00:00
Craig Topper
99ad3cc23e Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. 
llvm-svn: 140954
 2011-10-01 19:54:56 +00:00
Bill Wendling
98db234c02 Filecheck-ize. 
llvm-svn: 140904
 2011-09-30 23:40:29 +00:00
Bill Wendling
252b649025 Add new line at end of file. 
llvm-svn: 140903
 2011-09-30 23:21:11 +00:00
Bill Wendling
fcf3096d9b When inferring the pointer alignment, if the global doesn't have an initializer 
and the alignment is 0 (i.e., it's defined globally in one file and declared in
another file) it could get an alignment which is larger than the ABI allows for
that type, resulting in aligned moves being used for unaligned loads.

For instance, in file A.c:

   struct S s;

In file B.c:
   struct {
     // something long
   };
   extern S s;

   void foo() {
     struct S p = s;
     // ...
   }

this copy is a 'memcpy' which is turned into a series of 'movaps' instructions
on X86. But this is wrong, because 'struct S' has alignment of 4, not 16.

llvm-svn: 140902
 2011-09-30 23:19:55 +00:00
David Greene
7a9ac03042 Test More Complicated Lists 
Test of indexing lists of lists of lists works.  This also exercises
some operators.

llvm-svn: 140884
 2011-09-30 20:59:52 +00:00
David Greene
c5830e015f Test VarListElementInit:: resolveListElementReference 
Add a TableGen test to check if indexing lists of lists works.

llvm-svn: 140883
 2011-09-30 20:59:51 +00:00
Akira Hatanaka
5479850400 Remove unnecessary checking of register operands. 
llvm-svn: 140872
 2011-09-30 19:18:24 +00:00
Akira Hatanaka
c9268767d6 Add definitions of Mips64 rotate instructions. 
llvm-svn: 140870
 2011-09-30 18:51:46 +00:00
Jim Grosbach
d35eaaeb6e float comparison to double 'zero' constant can just be a float 'zero.' 
InstCombine was incorrectly considering the conversion of the constant
zero to be unsafe.

We want to transform:
define float @bar(float %x) nounwind readnone optsize ssp {
  %conv = fpext float %x to double
  %cmp = fcmp olt double %conv, 0.000000e+00
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}

Into:
define float @bar(float %x) nounwind readnone optsize ssp {
  %cmp = fcmp olt float %x, 0.000000e+00   ; <---- This
  %conv1 = zext i1 %cmp to i32
  %conv2 = sitofp i32 %conv1 to float
  ret float %conv2
}


rdar://10215914

llvm-svn: 140869
 2011-09-30 18:45:50 +00:00
Jim Grosbach
44047da675 ARM Darwin default relocation model is PIC. 
This matches clang, so default options in llc and friends are now closer to
clang's defaults.

llvm-svn: 140863
 2011-09-30 17:41:35 +00:00
Akira Hatanaka
ffa28d49f1 Check values of immediate operands. 
llvm-svn: 140860
 2011-09-30 17:19:21 +00:00
Duncan Sands
14b9c222c6 Add forgotten tests that the cleanup flag is cleared if there 
is a catch-all landingpad clause.

llvm-svn: 140858
 2011-09-30 17:00:34 +00:00
Duncan Sands
b4c8b2d9fa Inlining often produces landingpad instructions with repeated 
catch or repeated filter clauses.  Teach instcombine a bunch
of tricks for simplifying landingpad clauses.  Currently the
code only recognizes the GNU C++ and Ada personality functions,
but that doesn't stop it doing a bunch of "generic" transforms
which are hopefully fine for any real-world personality function.
If these "generic" transforms turn out not to be generic, they
can always be conditioned on the personality function.  Probably
someone should add the ObjC++ personality function.  I didn't as
I don't know anything about it.

llvm-svn: 140852
 2011-09-30 13:12:16 +00:00
Akira Hatanaka
dcd69c2e07 Mips64 shift instructions. 
llvm-svn: 140841
 2011-09-30 03:18:46 +00:00