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706927c96a
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28890 Commits

Author SHA1 Message Date
Evan Cheng
706927c96a Add comments. 
llvm-svn: 73761
 2009-06-19 07:06:07 +00:00
Eli Friedman
5cccb60bad Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to 
handle with an SSE2 instruction.

llvm-svn: 73760
 2009-06-19 07:00:55 +00:00
Evan Cheng
8f613095de Should be using Bcc (average) latency to determine if-conversion threshold, not BL. 
llvm-svn: 73759
 2009-06-19 06:56:26 +00:00
Eli Friedman
eb83635a7e Minor cleanup; fixes review comments for a previous patch. Sorry for 
taking so long to get to this!

llvm-svn: 73757
 2009-06-19 06:01:55 +00:00
Nick Lewycky
a5f89b09c6 Teach jump threading to look at comparisons between phi nodes and non-constants. 
llvm-svn: 73755
 2009-06-19 04:56:29 +00:00
Eli Friedman
b2688e9b73 Misc tweaks to Intel asm printing to make it more compatible with MASM. 
Patch by Benedict Gaster.

llvm-svn: 73753
 2009-06-19 04:48:38 +00:00
Chris Lattner
8ddc06469c Improve tail call elim to move loads above readonly calls 
when it allows forming a tail call.  Patch by Frits van
Bommel.  This implements PR4323.

llvm-svn: 73752
 2009-06-19 04:22:16 +00:00
Chris Lattner
3a683c551f part of PR4405: disable a contentious optimization for 
strcmp -> memcmp when the lengths of the strings are unknown.

Patch by Nick Lewycky!

llvm-svn: 73751
 2009-06-19 04:17:36 +00:00
Lang Hames
1bade5ff09 More VNInfo tweaking, plus a little progress on intra-block splitting. 
llvm-svn: 73750
 2009-06-19 02:17:53 +00:00
Evan Cheng
667924dc46 Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr. 
llvm-svn: 73749
 2009-06-19 01:59:04 +00:00
Evan Cheng
f671ce4eba Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. 
llvm-svn: 73747
 2009-06-19 01:51:50 +00:00
Eli Friedman
003abaa60d Mark a few Thumb instructions commutable; just happened to spot this 
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.

llvm-svn: 73746
 2009-06-19 01:43:08 +00:00
Chris Lattner
f077552a99 add a file I missed, this goes with r73743 
llvm-svn: 73744
 2009-06-19 00:47:59 +00:00
Chris Lattner
3624754e23 Add some scaffolding for a new experimental asmprinter 
implementation.  The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst.  MCInst
and the new asmprinters will not depend on most of the 
llvm code generators.  This allows building diassemblers
that don't link in the whole llvm code generator.  This is
step #1 of many.

llvm-svn: 73743
 2009-06-19 00:47:33 +00:00
Chris Lattner
c2b0fd0304 merge the common darwin settings from the X86/PPC/ARM targets 
into DarwinTargetAsmInfo.cpp.  The remaining differences should
be evaluated.  It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.

llvm-svn: 73742
 2009-06-19 00:08:39 +00:00
Chris Lattner
6cd267dcc5 move mangler quote handling from asm printers to TargetAsmInfo. 
llvm-svn: 73738
 2009-06-18 23:41:35 +00:00
Chris Lattner
fea7aa45b7 minor cleanup 
llvm-svn: 73737
 2009-06-18 23:33:13 +00:00
Chris Lattner
ea0ea2f4bc simplify macro debug info directive handling. 
llvm-svn: 73736
 2009-06-18 23:31:37 +00:00
Evan Cheng
7426d278ae Remove UseThumbBacktraces. Just check if subtarget is darwin. 
llvm-svn: 73734
 2009-06-18 23:14:30 +00:00
Owen Anderson
99dc404fc5 Add a parent pointer to SCEV, in preparation for getting rid of the global uniquing tables. No functionality change. 
llvm-svn: 73728
 2009-06-18 22:25:12 +00:00
Lang Hames
7f288c29af Improved PHI def marking, replaced some gotos with breaks. 
llvm-svn: 73727
 2009-06-18 22:01:47 +00:00
Owen Anderson
939dedb16c Simplify. 
llvm-svn: 73725
 2009-06-18 21:35:56 +00:00
Owen Anderson
06820ef1ca Simplify. 
llvm-svn: 73723
 2009-06-18 20:56:48 +00:00
Owen Anderson
b7742c5035 Add a SmartScopedLock, and use it to simplify code. 
llvm-svn: 73722
 2009-06-18 20:51:00 +00:00
Owen Anderson
376f7669a3 Simplify with SmartRWMutex. 
llvm-svn: 73721
 2009-06-18 20:44:31 +00:00
Evan Cheng
6c1c55f942 On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body. 
llvm-svn: 73720
 2009-06-18 20:37:15 +00:00
Owen Anderson
844cf0aa3f Simplify by using no-op-when-not-multithreaded locks. 
llvm-svn: 73719
 2009-06-18 20:36:21 +00:00
Dan Gohman
da82dc2ec1 Generalize LSR's OptimizeSMax to handle unsigned max tests as well 
as signed max tests. Along with r73717, this helps CodeGen avoid
emitting code for a maximum operation for this class of loop.

llvm-svn: 73718
 2009-06-18 20:23:18 +00:00
Dan Gohman
cc9634d988 Recognize n != 0 ? n : 1 as umax(n, 1). Previously only ULT/UGT/ULE/UGE 
comparisons were recognized for umax, but instcombine canonicalizes
unsigned comparisons with zero to this simpler form.

llvm-svn: 73717
 2009-06-18 20:21:07 +00:00
Owen Anderson
cc8947381f Simplify using mutexes that become no-ops when not in multithreaded mode. 
llvm-svn: 73716
 2009-06-18 20:15:26 +00:00
Anton Korobeynikov
fed9dcc88c Revert IRBuilder CC propagation. Fix SimplifyLibCalls instead. 
llvm-svn: 73715
 2009-06-18 20:05:31 +00:00
Owen Anderson
5d40f51e4e Simplify a lot of code by using a R/W mutex that becomes a no-op when multithreading is disabled. 
llvm-svn: 73714
 2009-06-18 19:10:19 +00:00
Owen Anderson
377fe286ca Use SmartMutex to simplify. 
llvm-svn: 73712
 2009-06-18 18:36:34 +00:00
Owen Anderson
4760da0a7a Give RWMutex the SmartRWMutex treatment too. 
llvm-svn: 73710
 2009-06-18 18:26:15 +00:00
Owen Anderson
9aaa6b8958 Insert a SmartMutex templated class into the class hierarchy, which takes a template parameter specifying whether this mutex 
should become a no-op when not running in multithreaded mode.  Make sys::Mutex a typedef of SmartMutex<false>, to preserve source compatibility.

llvm-svn: 73709
 2009-06-18 17:53:17 +00:00
Ted Kremenek
e88e953645 Update CMake files to account for new location of Threading.cpp. 
llvm-svn: 73708
 2009-06-18 17:47:09 +00:00
Owen Anderson
a59f91c08d Move Threading.[h|cpp] from Support to System. 
llvm-svn: 73707
 2009-06-18 16:54:52 +00:00
Dan Gohman
fd857b0406 Remove the code from IVUsers that attempted to handle 
casted induction variables in cases where the cast
isn't foldable. It ended up being a pessimization in
many cases. This could be fixed, but it would require
a bunch of complicated code in IVUsers' clients. The
advantages of this approach aren't visible enough to
justify it at this time.

llvm-svn: 73706
 2009-06-18 16:54:06 +00:00
Dan Gohman
dc884a7830 Generalize the zext(trunc(t) & C) instcombine to work even with 
C is not a low-bits mask, and add a similar instcombine for
zext((trunc(t) & C) ^ C).

llvm-svn: 73705
 2009-06-18 16:30:21 +00:00
Dan Gohman
b426c5dd35 Update a comment to reflect the code. 
llvm-svn: 73704
 2009-06-18 16:24:47 +00:00
Owen Anderson
7d2d5c974e Fix the double checked locking in this file too. 
llvm-svn: 73703
 2009-06-18 16:17:42 +00:00
Owen Anderson
a74e3d8a1c As pointed out by Duncan, I accidentally dropped the first MemoryFence of the 
double-checked locking pattern here.

llvm-svn: 73701
 2009-06-18 16:08:27 +00:00
Owen Anderson
f71490c586 Fix build when disable thread support. 
Patch by Howard Su.

llvm-svn: 73680
 2009-06-18 04:44:46 +00:00
Nick Lewycky
bd1de19b3f Add braces to clarify if/else structure and remove warning. 
llvm-svn: 73673
 2009-06-18 03:01:42 +00:00
Evan Cheng
82a8ab8a8e - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. 
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.

llvm-svn: 73671
 2009-06-18 02:04:01 +00:00
Dale Johannesen
6bffdac70a It looks like nobody is working on PR 4158, so I'm 
adding a check to catch this case at compile time
instead of quietly generating incorrect code.
That will at least let us identify CBE failures
that are not due to this problem.

llvm-svn: 73668
 2009-06-18 01:07:23 +00:00
Dan Gohman
9b236593c3 Fix trailing whitespace from ScalarEvolution::print. 
llvm-svn: 73666
 2009-06-18 00:37:45 +00:00
Bob Wilson
1866500851 ARM unified syntax is not specific to ELF; use it for Darwin, too. 
llvm-svn: 73665
 2009-06-18 00:36:17 +00:00
Dan Gohman
e72fd546a2 Teach ScalarEvolution how to recognize another xor(and(x, C), C) case. 
If C is a single bit and the and gets analyzed as a truncate and
zero-extend, the xor can be represnted as an add.

llvm-svn: 73664
 2009-06-18 00:00:20 +00:00
Dan Gohman
eb8d3f5fd5 Delete unnecessary braces. 
llvm-svn: 73663
 2009-06-17 23:54:37 +00:00