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Commit Graph

19726 Commits

Author SHA1 Message Date
Chris Lattner
f91a79a306 Add RegisterDefIsDead to correspond to KillsRegister, mark both const
llvm-svn: 22987
2005-08-23 22:43:24 +00:00
Chris Lattner
610eeca969 Keep track of which registers are related to which other registers.
Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting.  This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now.  This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.

On this program, on itanium, live intervals now takes 41% of llc time.

llvm-svn: 22986
2005-08-23 22:27:31 +00:00
Chris Lattner
a6da5575c8 add a method
llvm-svn: 22985
2005-08-23 21:45:31 +00:00
Chris Lattner
aba58bd49b Fix PR618 and Regression/CodeGen/CBackend/2005-08-23-Fmod.ll by not emitting
x%y for 'rem' on fp values.

llvm-svn: 22984
2005-08-23 20:22:50 +00:00
Chris Lattner
374051379d New testcase for PR618
llvm-svn: 22983
2005-08-23 20:22:07 +00:00
Chris Lattner
86a4a4745c add a note
llvm-svn: 22982
2005-08-23 06:27:59 +00:00
Nate Begeman
a8ec868347 Ack, typo
llvm-svn: 22981
2005-08-23 05:45:10 +00:00
Nate Begeman
0ac8bb2fe1 Add an option to make SetCC illegal as a beta option
llvm-svn: 22979
2005-08-23 05:42:36 +00:00
Nate Begeman
f1581c11e9 Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into
either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.

llvm-svn: 22978
2005-08-23 05:41:12 +00:00
Nate Begeman
885680bafb Teach Legalize how to turn setcc into select_cc
llvm-svn: 22977
2005-08-23 04:29:48 +00:00
Nate Begeman
383c7553a6 Remove some instructions we no longer generate
llvm-svn: 22976
2005-08-23 01:16:46 +00:00
Chris Lattner
86ab578e3e Remove some regs that are not used.
llvm-svn: 22975
2005-08-22 22:32:13 +00:00
Chris Lattner
362eff4ccd Nate noticed that 30% of the malloc/frees in llc come from calls to LowercaseString
in the asmprinter.  This changes the .td files to use lower case register names,
avoiding the need to do this call.  This speeds up the asmprinter from 1.52s
to 1.06s on kc++ in a release build.

llvm-svn: 22974
2005-08-22 22:00:02 +00:00
Chris Lattner
ef8f06856f Fix a crash I introduced into the IA64 backend with my copyfromreg change.
It used to crash on any function that took float arguments.

llvm-svn: 22973
2005-08-22 21:33:11 +00:00
Chris Lattner
2c5f36d938 Try to avoid scanning the fixed list. On architectures with a non-stupid
number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers.  Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these).  This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).

This reduces ppc llc compile time from 184s -> 172s on kc++.  This is probably
worth FAR FAR more on itanium though.

llvm-svn: 22972
2005-08-22 20:59:30 +00:00
Chris Lattner
9b0058b424 Move some code in the register assignment case that only needs to happen if
we spill out of the fast path.  The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs.  This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.

llvm-svn: 22971
2005-08-22 20:20:42 +00:00
Chris Lattner
36b8efcedd Add a pass name for -time-passes output
llvm-svn: 22970
2005-08-22 18:28:09 +00:00
Chris Lattner
d73a5042d9 Fix a problem where constant expr shifts would not have their shift amount
promoted to the right type.  This fixes: IA64/2005-08-22-LegalizerCrash.ll

llvm-svn: 22969
2005-08-22 17:28:31 +00:00
Chris Lattner
7ed2f46d60 Testcase for a crash in the legalizer on ia64. This is reduced from kc++.
llvm-svn: 22968
2005-08-22 17:16:49 +00:00
Chris Lattner
a43a966d4b Add a long-overdue itanium regression test dir: hint hint Duraid :)
llvm-svn: 22967
2005-08-22 17:15:41 +00:00
Chris Lattner
a9710ba54f Speed up this loop a bit, based on some observations that Nate made, and
add some comments.  This loop really needs to be reevaluated!

llvm-svn: 22966
2005-08-22 16:55:22 +00:00
Chris Lattner
5ba4ca426d Revert my patch which changed the code to not work.
llvm-svn: 22965
2005-08-22 16:24:25 +00:00
Chris Lattner
0644097e61 Make the example a bit easier to understand, suggested by Jim.
llvm-svn: 22964
2005-08-22 16:11:46 +00:00
Chris Lattner
4c9d1715ff Implement stores.
llvm-svn: 22963
2005-08-22 01:27:59 +00:00
Chris Lattner
7ce81741ff Add a fast-path for register values. Add support for constant pool entries,
allowing us to compile this:

float %test2(float* %P) {
        %Q = load float* %P
        %R = add float %Q, 10.1
        ret float %R
}

to this:

_test2:
        lfs r2, 0(r3)
        lis r3, ha16(.CPI_test2_0)
        lfs r3, lo16(.CPI_test2_0)(r3)
        fadds f1, r2, r3
        blr

llvm-svn: 22962
2005-08-22 01:04:32 +00:00
Chris Lattner
86aceaf749 Fix compilation of:
float %test2(float* %P) {
        %Q = load float* %P
        %R = add float %Q, %Q
        ret float %R
}

By returning the right result.

llvm-svn: 22961
2005-08-22 00:59:14 +00:00
Chris Lattner
81cde8c7b6 Make sure expressions only have one use before emitting them into a place that is conditionally executed
llvm-svn: 22960
2005-08-22 00:47:28 +00:00
Chris Lattner
a3f9415a81 Implement most of load support. There is still a bug though.
llvm-svn: 22959
2005-08-21 22:31:09 +00:00
Chris Lattner
a51be5a84c add a method
llvm-svn: 22958
2005-08-21 22:30:42 +00:00
Chris Lattner
8927bf468d add anew method
llvm-svn: 22957
2005-08-21 22:30:30 +00:00
Chris Lattner
7a04eff613 Add support for frame index nodes
llvm-svn: 22956
2005-08-21 19:56:04 +00:00
Chris Lattner
cbbd212622 add a method
llvm-svn: 22955
2005-08-21 19:48:59 +00:00
Chris Lattner
5c82be2ffc ADd a method
llvm-svn: 22954
2005-08-21 19:48:53 +00:00
Chris Lattner
0d32366da7 Don't print out the MBB label for the entry mbb
llvm-svn: 22953
2005-08-21 19:09:33 +00:00
Chris Lattner
d8b7b492fe Simplify the logic for BRTWOWAY_CC handling. The isel code already
simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.

llvm-svn: 22952
2005-08-21 19:03:28 +00:00
Chris Lattner
0f148968ba Implement selection for branches.
llvm-svn: 22951
2005-08-21 18:50:37 +00:00
Chris Lattner
d76cf28d13 Add 5-operand version of SelectNodeTo
llvm-svn: 22950
2005-08-21 18:49:58 +00:00
Chris Lattner
481b47fc75 add a method
llvm-svn: 22949
2005-08-21 18:49:33 +00:00
Chris Lattner
3f6df51c19 Add support for basic blocks, fix a bug in result # computation
llvm-svn: 22948
2005-08-21 18:49:29 +00:00
Chris Lattner
9bb0d10479 When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r3, 1
.LBB_test_2:    ;
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}

llvm-svn: 22947
2005-08-21 18:03:09 +00:00
Chris Lattner
1994775d9d If the false value for a select_cc is really simple (has no inputs), evaluate
it in the block.  This codegens:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}

as:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        li r4, 1
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        or r2, r4, r4
.LBB_test_2:    ;
        or r3, r2, r2
        blr

... which is one fewer instruction.  The savings are more significant for
global address and constantfp nodes.

llvm-svn: 22946
2005-08-21 17:41:11 +00:00
Chris Lattner
8c314e8d4d Fix a bug in the RUN line
llvm-svn: 22945
2005-08-21 16:37:36 +00:00
Duraid Madina
06affa0edd reenable collapse of loadimm+AND -> dep.z (thanks guys)
llvm-svn: 22944
2005-08-21 15:43:53 +00:00
Chris Lattner
7c3e52ef92 fix bogus warning
llvm-svn: 22943
2005-08-20 18:07:27 +00:00
Jim Laskey
43192e173f Repair an out by one error for IA64.
llvm-svn: 22942
2005-08-20 11:05:23 +00:00
Chris Lattner
9fbbc41021 add support for global address, including PIC support.
This REALLY should be lowered by the legalizer!

llvm-svn: 22941
2005-08-19 22:38:53 +00:00
Chris Lattner
5b7488224d Add support for global address nodes
llvm-svn: 22940
2005-08-19 22:38:24 +00:00
Chris Lattner
0c4565bf91 ADd support for TargetGlobalAddress nodes
llvm-svn: 22939
2005-08-19 22:31:34 +00:00
Chris Lattner
5210fd0e51 Add support for TargetGlobalAddress nodes
llvm-svn: 22938
2005-08-19 22:31:04 +00:00
Chris Lattner
bedf8e757a Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows
us to compile stuff like this:

double %test(double %A, double %B, double %C, double %E) {
        %F = mul double %A, %A
        %G = add double %F, %B
        %H = sub double -0.0, %G
        %I = mul double %H, %C
        %J = add double %I, %E
        ret double %J
}

to:

_test:
        fnmadd f0, f1, f1, f2
        fmadd f1, f0, f3, f4
        blr

woot!

llvm-svn: 22937
2005-08-19 21:43:53 +00:00