RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00
Code Issues Projects Releases Wiki Activity
201,024 Commits 4 Branches 5 Tags
Commit Graph

2 Commits

Author SHA1 Message Date
Cullen Rhodes
f2a50c987a [AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics 
Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D82399
 2020-06-24 10:06:31 +00:00
Francesco Petrogalli
73eebf7702 [llvm][CodeGen] IR intrinsics for SVE2 contiguous conflict detection instructions. 
Summary:
The IR intrinsics are mapped to the following SVE2 instructions:

* WHILERW <Pd>.<T>, <Xn>, <Xm>
* WHILEWR <Pd>.<T>, <Xn>, <Xm>

The intrinsics introduced in this patch are the IR counterpart of the
SVE ACLE functions `svwhilerw` and `svwhilewr` (all data type
variants).

Patch by Maciej Gąbka <maciej.gabka@arm.com>.

Reviewers: kmclaughlin, rengolin

Reviewed By: kmclaughlin

Subscribers: tschuett, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75862
 2020-03-11 18:28:02 +00:00