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15 Commits

Author SHA1 Message Date
Evan Cheng
4a169be530 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
 2011-06-28 19:10:37 +00:00
Dan Gohman
97d22ade75 Don't set kill flags for instructions which the scheduler has cloned. 
llvm-svn: 103827
 2010-05-14 22:01:14 +00:00
Evan Cheng
f7b5c86a0b Teach scheduler about REG_SEQUENCE. 
llvm-svn: 102984
 2010-05-04 00:22:40 +00:00
Dan Gohman
68f04d06c8 Get rid of the EdgeMapping map. Instead, just check for BasicBlock 
changes before doing phi lowering for switches.

llvm-svn: 102809
 2010-05-01 00:01:06 +00:00
Dan Gohman
066b8d3640 EmitDbgValue doesn't need its EdgeMapping argument. 
llvm-svn: 102742
 2010-04-30 19:35:33 +00:00
Evan Cheng
dc0ce1eae8 - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue. 
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.

llvm-svn: 102323
 2010-04-26 07:38:55 +00:00
Chris Lattner
7382099e8f reapply 99444/99445, which I speculatively reverted in 
r99453.

llvm-svn: 99482
 2010-03-25 04:41:16 +00:00
Evan Cheng
abefdb6d68 Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers. 
Here is a theoretical example that illustrates why the placement is important.

tmp1 = 
store tmp1 -> x
...
tmp2 = add ...
...
call
...
store tmp2 -> x

Now mem2reg comes along:

tmp1 = 
dbg_value (tmp1 -> x)
...
tmp2 = add ...
...
call
...
dbg_value (tmp2 -> x)

When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1.

Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers").

This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed.

llvm-svn: 99469
 2010-03-25 01:38:16 +00:00
Chris Lattner
0bbe76ccc4 revert 99444/99445. This doesn't cause the failure of 
2006-07-19-stwbrx-crash.ll for me, but it's the only likely
patch in the blame list of several bots.  Lets see if this
fixes it.

llvm-svn: 99453
 2010-03-24 23:41:19 +00:00
Chris Lattner
c7a6ab89fb remove dead argument. 
llvm-svn: 99445
 2010-03-24 22:47:12 +00:00
Chris Lattner
d581e0398e split EmitNode in half to reduce indentation. 
llvm-svn: 99444
 2010-03-24 22:45:47 +00:00
Dale Johannesen
987770c05d Progress towards shepherding debug info through SelectionDAG. 
No functional effect yet.  This is still evolving and should
not be viewed as final.

llvm-svn: 98195
 2010-03-10 22:13:47 +00:00
Dale Johannesen
f0c8e76a85 Add some new bits of debug info handling. No 
functional change yet.

llvm-svn: 97855
 2010-03-06 00:03:23 +00:00
Dan Gohman
0679a637b3 Fix a typo in a comment. 
llvm-svn: 88953
 2009-11-16 20:35:59 +00:00
Dan Gohman
605f85e0e6 Create a new InstrEmitter class for translating SelectionDAG nodes 
into MachineInstrs. This is mostly just moving the code from
ScheduleDAGSDNodesEmit.cpp into a new class. This decouples MachineInstr
emitting from scheduling.

llvm-svn: 83699
 2009-10-10 01:32:21 +00:00