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1087 Commits

Author SHA1 Message Date
Evan Cheng
7249bab8a5 80 col violation. 
llvm-svn: 74693
 2009-07-02 06:44:30 +00:00
Evan Cheng
57bb186a0c Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate. 
llvm-svn: 74692
 2009-07-02 06:38:40 +00:00
Evan Cheng
bdf117bfac 80 col violation. 
llvm-svn: 74683
 2009-07-02 01:30:04 +00:00
Evan Cheng
d9f23ceeb9 Factor out ARM indexed load matching code. 
llvm-svn: 74681
 2009-07-02 01:23:32 +00:00
Bob Wilson
810a970c6f Add a new addressing mode for NEON load/store instructions. 
llvm-svn: 74658
 2009-07-01 23:16:05 +00:00
Bob Wilson
e3f8a640ac Fix a comment typo. 
llvm-svn: 74650
 2009-07-01 21:59:43 +00:00
Bob Wilson
11cddb5deb Fix up a comment: besides the >80col lines, the operation for this 
addressing mode is encoded in the second operand, not the third.

llvm-svn: 74641
 2009-07-01 21:22:45 +00:00
Bill Wendling
fdd5badace Update comments to make it clear that the function alignment is the Log2 of the 
bytes and not bytes.

llvm-svn: 74624
 2009-07-01 18:50:55 +00:00
Evan Cheng
37503e9671 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. 
llvm-svn: 74580
 2009-07-01 01:59:31 +00:00
Daniel Dunbar
bc3d149e98 Remove unused AsmPrinter OptLevel argument, and propogate. 
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579
 2009-07-01 01:48:54 +00:00
David Goodwin
19aa5c7d51 Add PIC load and store patterns for Thumb-2. 
llvm-svn: 74577
 2009-07-01 00:01:13 +00:00
David Goodwin
aa1f876954 Thumb-2 load and store double description. But nothing yet creates them. 
llvm-svn: 74566
 2009-06-30 22:50:01 +00:00
Bill Wendling
c0fb316bd3 Add an "alignment" field to the MachineFunction object. It makes more sense to 
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.

llvm-svn: 74564
 2009-06-30 22:38:32 +00:00
David Goodwin
5805e9aef5 Add thumb-2 store word, halfword, and byte. 
llvm-svn: 74555
 2009-06-30 22:11:34 +00:00
David Goodwin
aad223dd8a Improve Thumb-2 jump table support. 
llvm-svn: 74549
 2009-06-30 19:50:22 +00:00
David Goodwin
5545d82866 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. 
llvm-svn: 74543
 2009-06-30 18:04:13 +00:00
Evan Cheng
2a527c3419 A few more load instructions. 
llvm-svn: 74500
 2009-06-30 02:15:48 +00:00
David Goodwin
4f53387d26 Add Thumb-2 support for TEQ amd TST. 
llvm-svn: 74468
 2009-06-29 22:49:42 +00:00
David Goodwin
9e1280adf3 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. 
llvm-svn: 74423
 2009-06-29 15:33:01 +00:00
Duncan Sands
660e9c2106 Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt 
to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.

llvm-svn: 74421
 2009-06-29 13:11:32 +00:00
Evan Cheng
093adf3ff9 Implement Thumb2 ldr. 
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420
 2009-06-29 07:51:04 +00:00
Anton Korobeynikov
7231e149ef Simplify a bit 
llvm-svn: 74385
 2009-06-27 12:59:03 +00:00
Anton Korobeynikov
1db77899c1 ARM refactoring. Step 2: split RegisterInfo 
llvm-svn: 74384
 2009-06-27 12:16:40 +00:00
Douglas Gregor
6ee152cc94 Add ThumbInstrInfo.cpp to the CMake makefiles 
llvm-svn: 74382
 2009-06-27 07:44:59 +00:00
Evan Cheng
817712377a Renaming for consistency. 
llvm-svn: 74368
 2009-06-27 02:26:13 +00:00
David Goodwin
e1979dfbf5 Remove outdated comment. 
llvm-svn: 74357
 2009-06-26 23:39:02 +00:00
David Goodwin
90fc344e41 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. 
llvm-svn: 74355
 2009-06-26 23:13:13 +00:00
Anton Korobeynikov
aab56476b2 Split thumb-related stuff into separate classes. 
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

llvm-svn: 74329
 2009-06-26 21:28:53 +00:00
David Goodwin
921faa64cd Thumb-2 has CLZ. 
llvm-svn: 74322
 2009-06-26 20:47:43 +00:00
David Goodwin
9da977f216 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc". 
llvm-svn: 74321
 2009-06-26 20:45:56 +00:00
David Goodwin
46eb5a7a2d ADC used to implement adde should use "adcs" opcode instead of "adc". 
llvm-svn: 74293
 2009-06-26 18:07:25 +00:00
David Goodwin
877790aa5f Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. 
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.

llvm-svn: 74288
 2009-06-26 16:10:07 +00:00
Evan Cheng
b93625f89e Simplify predicate CarryDefIsUsed. 
llvm-svn: 74277
 2009-06-26 06:10:18 +00:00
Devang Patel
a7a5664fbb Let's ignore MDStrings also! 
llvm-svn: 74255
 2009-06-26 02:26:12 +00:00
Evan Cheng
2eb1525e2a Add a note about commuting conditional move. 
llvm-svn: 74241
 2009-06-26 00:28:48 +00:00
Evan Cheng
f23c8a5c8a These are done / no longer applicable. 
llvm-svn: 74239
 2009-06-26 00:25:27 +00:00
Evan Cheng
4f0e461e97 Mark a bunch of instructions commutable. 
llvm-svn: 74237
 2009-06-26 00:19:44 +00:00
Evan Cheng
e45355b804 tst is also commutable. 
llvm-svn: 74236
 2009-06-26 00:19:07 +00:00
Evan Cheng
4ac765118d Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used. 
llvm-svn: 74228
 2009-06-25 23:34:10 +00:00
David Goodwin
74414108e9 Use MVN for ~t2_so_imm immediates. 
llvm-svn: 74223
 2009-06-25 23:11:21 +00:00
David Goodwin
a0ed5f6847 Add Def/Use of CPSR for Thumb-1 instructions. 
llvm-svn: 74219
 2009-06-25 22:49:55 +00:00
Evan Cheng
331e7cc684 Unbreak mingw build. Patch by Viktor Kutuzov. 
llvm-svn: 74212
 2009-06-25 22:04:44 +00:00
Evan Cheng
0cced3daa8 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS. 
llvm-svn: 74200
 2009-06-25 20:59:23 +00:00
David Goodwin
c72bad36d7 Test commit 
llvm-svn: 74185
 2009-06-25 17:52:32 +00:00
Bob Wilson
38779c951a Revert 74164. We'll want to use this method later. 
llvm-svn: 74176
 2009-06-25 16:03:07 +00:00
Bob Wilson
ef8fd818bf Remove unused hasV6T2Ops method. We already have a separate feature to 
identify Thumb2.

llvm-svn: 74164
 2009-06-25 05:20:31 +00:00
Douglas Gregor
7841f61ced Add missing dependencies to the CMake build system. 
llvm-svn: 74161
 2009-06-25 05:03:06 +00:00
Evan Cheng
a3be8cba60 Change thumb2 instruction definitions so if-converter so add predicate operands and / or flip the 's' bit to set the condition flag. 
llvm-svn: 74158
 2009-06-25 02:08:06 +00:00
Evan Cheng
e31583bf2a Add thumb2 add sp. 
llvm-svn: 74156
 2009-06-25 01:21:30 +00:00
Evan Cheng
8e61610960 Some reorg and additional comments. 
llvm-svn: 74152
 2009-06-25 01:05:06 +00:00