1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 22:12:57 +02:00
Commit Graph

270 Commits

Author SHA1 Message Date
Chris Lattner
e22a1d941e remove some uses of llvm/Support/Streams.h
llvm-svn: 79842
2009-08-23 08:43:55 +00:00
Chris Lattner
db2965c71f remove various std::ostream version of printing methods from
MachineInstr and MachineOperand.  This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)

llvm-svn: 79813
2009-08-23 03:41:05 +00:00
Owen Anderson
9df206d02d Push LLVMContexts through the IntegerType APIs.
llvm-svn: 78948
2009-08-13 21:58:54 +00:00
Jakob Stoklund Olesen
543aeb60c0 Don't tamper with <undef> operands in MachineInstr::addRegisterKilled.
For an undef operand, MO.getReg() is meaningless and we should not use it.
Undef operands should be skipped entirely.

llvm-svn: 78095
2009-08-04 20:09:25 +00:00
Jakob Stoklund Olesen
1b274fd5f0 Fix Bug 4657: register scavenger asserts with subreg lowering
When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG
instriction because it is an identity copy, make sure that the same registers
are alive before and after the elimination.

When the super-register is marked <undef> this requires inserting an
IMPLICIT_DEF instruction to make sure the super register is live.

Fix a related bug where a kill flag on the inserted sub-register was not transferred properly.

Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid.

llvm-svn: 77989
2009-08-03 20:08:18 +00:00
Jakob Stoklund Olesen
fe8f36d66b Never add a kill flag to a constrained physical register in a two-addr instruction.
llvm-svn: 77906
2009-08-02 19:13:03 +00:00
Evan Cheng
67f68983fe Fix a typo.
llvm-svn: 77369
2009-07-28 21:49:18 +00:00
Jakob Stoklund Olesen
96f9a917c8 Fix http://llvm.org/bugs/show_bug.cgi?id=4583
Inline asm instructions may have additional <imp-def,kill> register operands.
These operands are not marked with a flag like the normal asm operands, so we
must not assert that there is a flag.

llvm-svn: 76373
2009-07-19 19:09:59 +00:00
Jakob Stoklund Olesen
4a0d996780 Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.

llvm-svn: 76101
2009-07-16 20:58:34 +00:00
Torok Edwin
f955a6ef49 llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").

llvm-svn: 75640
2009-07-14 16:55:14 +00:00
Torok Edwin
ae8a3ff177 assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.

llvm-svn: 75379
2009-07-11 20:10:48 +00:00
Evan Cheng
c6c942b70f Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.

llvm-svn: 74518
2009-06-30 08:49:04 +00:00
Chris Lattner
cabe904f79 Rearrange some stuff in MachineOperand and add a new TargetFlags field.
llvm-svn: 74087
2009-06-24 17:54:48 +00:00
Evan Cheng
7292cadf06 Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode).
llvm-svn: 74053
2009-06-24 02:05:51 +00:00
Dan Gohman
ee407d25ca Remove some unnecessary #includes.
llvm-svn: 72948
2009-06-05 16:32:58 +00:00
Argyrios Kyrtzidis
9956976b76 Make DebugLoc independent of DwarfWriter.
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)

llvm-svn: 70520
2009-04-30 23:22:31 +00:00
Jakob Stoklund Olesen
0bfaaea2a4 MachineInstr::isRegTiedTo{Use,Def}Operand can safely be made const.
llvm-svn: 70408
2009-04-29 20:57:16 +00:00
Dan Gohman
420019a18a Fix MachineInstr::getNumExplicitOperands to count
variadic operands correctly. Patch by Jakob Stoklund Olesen!

llvm-svn: 69190
2009-04-15 17:59:11 +00:00
Dan Gohman
c9b68844d6 Give RemoveRegOperandFromRegInfo a comment and move the
code out of line.

llvm-svn: 69124
2009-04-15 01:17:37 +00:00
Chris Lattner
4c5310e25e ignore register zero in isRegTiedToUseOperand, following the example of
isRegTiedToDefOperand.  Thanks to Bob for pointing this out!

llvm-svn: 68734
2009-04-09 23:33:34 +00:00
Bob Wilson
c53238dff1 Fix pr3954. The register scavenger asserts for inline assembly with
register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).

llvm-svn: 68714
2009-04-09 17:16:43 +00:00
Chris Lattner
301c4f39a0 reg0 references are not real registers. This fixes a crash on the
attached testcase.

llvm-svn: 68712
2009-04-09 16:50:43 +00:00
Evan Cheng
2ec94dd447 Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
llvm-svn: 67512
2009-03-23 08:01:15 +00:00
Evan Cheng
f47c144bff Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.
llvm-svn: 67335
2009-03-19 20:30:06 +00:00
Bill Wendling
1c0692657d Print out debug info when printing the machine instruction.
llvm-svn: 65067
2009-02-19 21:44:55 +00:00
Dale Johannesen
718c678fde Add a DebugLoc field and some simple accessors.
llvm-svn: 63152
2009-01-27 23:20:29 +00:00
Dan Gohman
1c1b281cd5 Use isTerminator() instead of isBranch()||isReturn() in
several places. isTerminator() returns true for a superset
of cases, and includes things like FP_REG_KILL, which are
nither return or branch but aren't safe to move/remat/etc.

llvm-svn: 61373
2008-12-23 17:28:50 +00:00
Dan Gohman
47de8c174c Print subreg information in MachineInstr::dump.
llvm-svn: 61213
2008-12-18 21:51:27 +00:00
Dan Gohman
a52e83a6ca Minor code simplification.
llvm-svn: 60804
2008-12-09 22:45:08 +00:00
Dan Gohman
1e7dff35a6 Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.
llvm-svn: 60586
2008-12-05 05:45:42 +00:00
Dan Gohman
04e99d0f3f Add more const qualifiers. This fixes build breakage from r59540.
llvm-svn: 59542
2008-11-18 19:49:32 +00:00
Dan Gohman
5926405b4a Make some methods const.
llvm-svn: 59540
2008-11-18 19:04:29 +00:00
Mon P Wang
3b3ab0fa30 Added missing print functions that take a raw_ostream
llvm-svn: 57339
2008-10-10 01:43:55 +00:00
Dan Gohman
30c5ce1b7d Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Dan Gohman
c48242640d Fix a think-o in isSafeToMove. This fixes it from thinking that
volatile memory references are safe to move.

llvm-svn: 56948
2008-10-02 15:04:30 +00:00
Dale Johannesen
bc29bec7f8 Next round of earlyclobber handling. Approach the
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
2008-09-24 01:07:17 +00:00
Dan Gohman
0cf7b31c69 Add a method to MachineInstr for testing whether it makes
any volatile memory references.

llvm-svn: 56528
2008-09-24 00:06:15 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
2008-09-17 21:13:11 +00:00
Dale Johannesen
57fc1bdfdc adjust last patch per review feedback
llvm-svn: 56194
2008-09-14 01:44:36 +00:00
Dan Gohman
fa32c7c6d9 Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189
2008-09-13 17:58:21 +00:00
Dale Johannesen
6395da3510 Pass "earlyclobber" bit through to machine
representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161
2008-09-12 17:49:03 +00:00
Dan Gohman
ec225915fa Fix addRegisterDead and addRegisterKilled to be more thorough
when searching for redundant subregister dead/kill bits.

Previously it was common to see instructions marked like this:
  "RET %EAX<imp-use,kill>, %AX<imp-use,kill>"

With this change, addRegisterKilled continues scanning after
finding the %EAX operand, so it proceeds to discover the
redundant %AX kill and eliminates it, producing this:
  "RET %EAX<imp-use,kill>"

This currently has no effect on the generated code.

llvm-svn: 55698
2008-09-03 15:56:16 +00:00
Evan Cheng
4cfcf9ca51 Fold isRematerializable checks into isSafeToReMat.
llvm-svn: 55563
2008-08-30 09:07:18 +00:00
Evan Cheng
cf2cb4da82 Move the check whether it's worth remating to caller.
llvm-svn: 55434
2008-08-27 20:58:54 +00:00
Evan Cheng
dc202f4bba Refactor isSafeToReMat out of 2addr pass.
llvm-svn: 55430
2008-08-27 20:33:50 +00:00
Chris Lattner
e5073632e2 simplify PseudoSourceValue printing a bit. Unnest all of PseudoSourceValue.cpp from the llvm namespace.
llvm-svn: 55293
2008-08-24 20:37:32 +00:00
Evan Cheng
19c915aa0e Print PseudoSourceValue.
llvm-svn: 55291
2008-08-24 18:51:20 +00:00
Dan Gohman
e1a5bc775e Change the FoldingSetNodeID usage for objects which carry
alignment and volatility information, such as loads and
stores, to reduce the number of integer values added to
the FoldingSetNodeID.

llvm-svn: 55058
2008-08-20 15:58:01 +00:00
Owen Anderson
fd1d9b5c38 Move MachineInstr::getOpcode inline.
llvm-svn: 54807
2008-08-14 23:25:30 +00:00
Owen Anderson
169e5e5b99 Speed up addRegisterDead by adding more fast checks before performing the expensive
subregister query, and by increasing the size of the subregister hashtable so
that there are fewer collisions.

llvm-svn: 54781
2008-08-14 18:34:18 +00:00