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Commit Graph

181879 Commits

Author SHA1 Message Date
Petr Hosek
a33a1a19cb [sancov] Ignore PC samples with value 0
The sancov runtime for the (Fuchsia) Zircon kernel delivers results
in the standard format, but as the full array of possible samples
with 0 in uncovered slots. That runtime delivers "live" data and
has no final "export" pass to compactify out the uncovered slots,
and it seems silly to require another offline tool just for that.

Patch By: mcgrathr
Differential Revision: https://reviews.llvm.org/D63695

llvm-svn: 365839
2019-07-11 22:59:23 +00:00
Leonard Chan
9e855532d8 [NewPM] Port Sancov
This patch contains a port of SanitizerCoverage to the new pass manager. This one's a bit hefty.

Changes:

- Split SanitizerCoverageModule into 2 SanitizerCoverage for passing over
  functions and ModuleSanitizerCoverage for passing over modules.
- ModuleSanitizerCoverage exists for adding 2 module level calls to initialization
  functions but only if there's a function that was instrumented by sancov.
- Added legacy and new PM wrapper classes that own instances of the 2 new classes.
- Update llvm tests and add clang tests.

Differential Revision: https://reviews.llvm.org/D62888

llvm-svn: 365838
2019-07-11 22:35:40 +00:00
Stanislav Mekhanoshin
56fc31c89d [AMDGPU] Fixed asan error with agpr spilling
Instruction was used after it was erased.

llvm-svn: 365837
2019-07-11 22:30:11 +00:00
Diego Novillo
a353a58b9d Fix build errors LLVM tests are disabled.
Original patch from alanbaker@google.com

Fixes the error:
CMake Error in <...>/llvm/cmake/modules/CMakeLists.txt:

export called with target "LLVMTestingSupport" which requires target
"gtest" that is not in the export set.

This occurs when LLVM is embedded in a larger project, but is configured not to
include tests. If testing is disabled gtest isn't available and LLVM fails to
configure.

Differential revision: https://reviews.llvm.org/D63097

llvm-svn: 365836
2019-07-11 22:08:35 +00:00
Stanislav Mekhanoshin
8fffd2f294 [AMDGPU] gfx908 agpr spilling
Differential Revision: https://reviews.llvm.org/D64594

llvm-svn: 365833
2019-07-11 21:54:13 +00:00
Stefan Stipanovic
c892f2c16e [Attributor] Deduce "nosync" function attribute.
Introduce and deduce "nosync" function attribute to indicate that a function
does not synchronize with another thread in a way that other thread might free memory.

Reviewers: jdoerfert, jfb, nhaehnle, arsenm

Subscribers: wdng, hfinkel, nhaenhle, mehdi_amini, steven_wu,
dexonsmith, arsenm, uenoku, hiraditya, jfb, llvm-commits

Differential Revision: https://reviews.llvm.org/D62766

llvm-svn: 365830
2019-07-11 21:37:40 +00:00
Stanislav Mekhanoshin
00406d9acb [AMDGPU] gfx908 hazard recognizer
Differential Revision: https://reviews.llvm.org/D64593

llvm-svn: 365829
2019-07-11 21:30:34 +00:00
Huihui Zhang
1cef27c9fd [InstCombine][NFCI] Add more test coverage to onehot_merge.ll
Prep work for upcoming patch D64275.

llvm-svn: 365828
2019-07-11 21:28:25 +00:00
Stanislav Mekhanoshin
d6c4c0d5e3 [AMDGPU] gfx908 scheduling
Differential Revision: https://reviews.llvm.org/D64590

llvm-svn: 365826
2019-07-11 21:25:00 +00:00
Stanislav Mekhanoshin
38d5b257db [AMDGPU] gfx908 mfma support
Differential Revision: https://reviews.llvm.org/D64584

llvm-svn: 365824
2019-07-11 21:19:33 +00:00
Reid Kleckner
fdf5e96e3a Open native file handles to avoid converting from FDs, NFC
Follow up to r365588.

llvm-svn: 365820
2019-07-11 20:29:32 +00:00
David Bolvansky
63db8d6e55 [UpdateTestChecks] Emit warning when invalid test paths
Summary:
Recently I ran into the following issue:

./update_test_checks.py /path/not-existing-file.ll

The script was silent and I was suprised why the real test file hadn't been updated.

Solution:
Emit warning if we detect this problem.



Reviewers: lebedev.ri, spatel, jdoerfert, nikic

Reviewed By: lebedev.ri, spatel, jdoerfert, nikic

Subscribers: jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64572

llvm-svn: 365818
2019-07-11 20:14:22 +00:00
David Bolvansky
d0e081114e [NFC] Revisited tests for D64285
llvm-svn: 365815
2019-07-11 19:39:20 +00:00
Benjamin Kramer
6568dae345 [NVPTX] Remove now unused atomic.load.add.f32 intrinsics
llvm-svn: 365811
2019-07-11 19:21:59 +00:00
Jinsong Ji
8ea00e2dde [PowerPC][NFC] Update testcase to avoid dead code
The original testcase might be optimized out due to dead code,
update the testcase to avoid it.

llvm-svn: 365810
2019-07-11 19:16:33 +00:00
Craig Topper
a6c5922329 [X86] Pre commit test cases for D64574. Along with a test case for PR42571. NFC
llvm-svn: 365803
2019-07-11 18:19:27 +00:00
Wouter van Oortmerssen
6bc07142c8 [WebAssembly] Assembler: support negative float constants.
Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64367

llvm-svn: 365802
2019-07-11 18:18:07 +00:00
Benjamin Kramer
9f58875e26 [NVPTX] Use atomicrmw fadd instead of intrinsics
AutoUpgrade the old intrinsics to atomicrmw fadd.

llvm-svn: 365796
2019-07-11 17:11:25 +00:00
Nico Weber
08e1afb147 gn build: Merge r365792
llvm-svn: 365795
2019-07-11 17:09:35 +00:00
Sanjay Patel
1c7a59cca6 [X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483)
Follow up to D58597, where it was noted that the commuted ISD::SUB variant
was having problems with lack of combines.

See also D63958 where we untangled setcc/sub pairs.

Differential Revision: https://reviews.llvm.org/D58875

llvm-svn: 365791
2019-07-11 15:56:33 +00:00
Nico Weber
6e0926614f Fix a few 'no newline at end of file' warnings that Xcode emits
(Xcode even has a snazzy "Fix" button, but clicking that inserts two
newlines. So close!)

llvm-svn: 365789
2019-07-11 15:26:45 +00:00
Nico Weber
c5b35e725d gn build: Merge r365773
llvm-svn: 365787
2019-07-11 15:01:50 +00:00
Simon Pilgrim
f0e5cdd84d [DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
We already split extract_subvector(binop(insert_subvector(v,x),insert_subvector(w,y))) -> binop(x,y).

This patch adds support for extract_subvector(binop(concat_vectors(),concat_vectors())) cases as well.

In particular this means we don't have to wait for X86 lowering to convert concat_vectors to insert_subvector chains, which helps avoid some cases where demandedelts/combine calls occur too late to split large vector ops.

The fast-isel-store.ll load folding regression is annoying but I don't think is that critical.

Differential Revision: https://reviews.llvm.org/D63653

llvm-svn: 365785
2019-07-11 14:45:03 +00:00
Matt Arsenault
d4ba3941a6 RegUsageInfoCollector: Skip calling conventions I missed before
llvm-svn: 365784
2019-07-11 14:41:40 +00:00
Matt Arsenault
a514a06c79 AMDGPU/GlobalISel: Move kernel argument handling to separate function
llvm-svn: 365782
2019-07-11 14:18:25 +00:00
Matt Arsenault
85fefb1919 Fix missing C++ mode comment
llvm-svn: 365781
2019-07-11 14:18:22 +00:00
Matt Arsenault
94ef500159 GlobalISel: Use Register
llvm-svn: 365780
2019-07-11 14:18:19 +00:00
George Rimar
36e9592455 Revert r365775 - "[Object/ELF] - Improve error reporting for notes."
It broke BB: http://lab.llvm.org:8011/builders/clang-x86_64-debian-fast/builds/15419

llvm-svn: 365779
2019-07-11 14:03:27 +00:00
George Rimar
34564324f8 [Object/ELF] - Improve error reporting for notes.
This patch improves the error messages reported for
note sections and phdrs and also makes a cleanup for
existent test case.

Differential revision: https://reviews.llvm.org/D64470

llvm-svn: 365775
2019-07-11 13:47:44 +00:00
Sanjay Patel
8afd96f509 [InstCombine] don't move FP negation out of a constant expression
-(X * ConstExpr) becomes X * (-ConstExpr), so don't reverse that
and infinite loop.

llvm-svn: 365774
2019-07-11 13:44:29 +00:00
George Rimar
a63dd0ee11 [yaml2obj/elf-override-shsize.yaml] - An attemp to fix ppc64 bot.
Failture:
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/35670/steps/ninja%20check%201/logs/FAIL%3A%20LLVM%3A%3Aelf-override-shsize.yaml

Solution:
Change `od` tool invocation to print single bytes.

llvm-svn: 365772
2019-07-11 13:26:36 +00:00
Tim Northover
31c7657e49 OpaquePtr: switch to GlobalValue::getValueType in a few places. NFC.
llvm-svn: 365770
2019-07-11 13:13:02 +00:00
Tim Northover
208712ddb1 OpaquePtr: use byval accessor instead of inspecting pointer type. NFC.
The accessor can deal with both "byval(ty)" and "ty* byval" forms
seamlessly.

llvm-svn: 365769
2019-07-11 13:12:38 +00:00
Tim Northover
afa86e36b0 OpaquePtr: use load instruction directly for type. NFC.
llvm-svn: 365768
2019-07-11 13:12:08 +00:00
Tim Northover
b61249b21a InstructionSimplify: Simplify InstructionSimplify. NFC.
The interface predates CallBase, so both it and implementation were
significantly more complicated than they needed to be. There was even
some redundancy that could be eliminated.

Should also help with OpaquePointers by not trying to derive a
function's type from it's PointerType.

llvm-svn: 365767
2019-07-11 13:11:44 +00:00
George Rimar
f0e500c351 [yaml2obj] - Allow overriding the sh_size field.
There is no way to set broken sh_size field currently
for sections. It can be usefull for writing the
test cases. 

Differential revision: https://reviews.llvm.org/D64401

llvm-svn: 365766
2019-07-11 12:59:29 +00:00
David Bolvansky
5eef7bfdbd [NFC] Updated tests for D64285
llvm-svn: 365765
2019-07-11 12:51:33 +00:00
George Rimar
44f982eeb2 [llvm-readobj/llvm-readelf] - Report a warning instead of a error when dumping a broken dynamic section.
It does not make sence to stop dumping the object if the broken
dynamic section was found. In this patch I changed the behavior from
"report an error" to "report a warning". This matches GNU.

Differential revision: https://reviews.llvm.org/D64472

llvm-svn: 365762
2019-07-11 12:26:48 +00:00
David Bolvansky
e67c5ce969 [InstCombine] Reorder recently added/improved pow transformations
Changed cases are now faster with exp2.

llvm-svn: 365758
2019-07-11 10:55:04 +00:00
Florian Hahn
45d7ad6a15 Revert [BitcodeReader] Validate OpNum, before accessing Record array.
This reverts r365750 (git commit 8b222ecf2769ee133691f208f6166ce118c4a164)

llvm-dis runs out of memory while opening invalid-fcmp-opnum.bc on
llvm-hexagon-elf, probably because the bitcode file contains other
suspicious values.

http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/21949

llvm-svn: 365757
2019-07-11 10:53:40 +00:00
Simon Pilgrim
a1e75fb020 [X86] Regenerate intrinsics tests. NFCI.
llvm-svn: 365755
2019-07-11 10:40:23 +00:00
Simon Pilgrim
d094dba69e [AMDGPU] Regenerate idot tests. NFCI.
Reduces diff in D63281.

llvm-svn: 365754
2019-07-11 10:37:58 +00:00
Fangrui Song
3afa7d901e [llvm-objcopy] Don't change permissions of non-regular output files
There is currently an EPERM error when a regular user executes `llvm-objcopy a.o /dev/null`.
Worse, root can even change the mode bits of /dev/null.

Fix it by checking if the output file is special.

A new overload of llvm::sys::fs::setPermissions with FD as the parameter
is added. Users should provide `perm & ~umask` as the parameter if they
intend to respect umask.

The existing overload of llvm::sys::fs::setPermissions may be deleted if
we can find an implementation of fchmod() on Windows. fchmod() is
usually better than chmod() because it saves syscalls and can avoid race
condition.

Reviewed By: jakehehrlich, jhenderson

Differential Revision: https://reviews.llvm.org/D64236

llvm-svn: 365753
2019-07-11 10:17:59 +00:00
Fangrui Song
a6a4c14893 [X86] -fno-plt: use GOT __tls_get_addr only if GOTPCRELX is enabled
Summary:
As of binutils 2.32, ld has a bogus TLS relaxation error when the GD/LD
code sequence using R_X86_64_GOTPCREL (instead of R_X86_64_GOTPCRELX) is
attempted to be relaxed to IE/LE (binutils PR24784). gold and lld are good.

In gcc/config/i386/i386.md, there is a configure-time check of as/ld
support and the GOT relaxation will not be used if as/ld doesn't support
it:

    if (flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
      return "call\t%P2";
    return "call\t{*%p2@GOT(%1)|[DWORD PTR %p2@GOT[%1]]}";

In clang, -DENABLE_X86_RELAX_RELOCATIONS=OFF is the default. The ld.bfd
bogus error can be reproduced with:

    thread_local int a;
    int main() { return a; }

clang -fno-plt -fpic a.cc -fuse-ld=bfd

GOTPCRELX gained relative good support in 2016, which is considered
relatively new.  It is even difficult to conditionally default to
-DENABLE_X86_RELAX_RELOCATIONS=ON due to cross compilation reasons. So
work around the ld.bfd bug by only using GOT when GOTPCRELX is enabled.

Reviewers: dalias, hjl.tools, nikic, rnk

Reviewed By: nikic

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64304

llvm-svn: 365752
2019-07-11 10:10:09 +00:00
Florian Hahn
4328722a26 [BitcodeReader] Validate OpNum, before accessing Record array.
Currently invalid bitcode files can cause a crash, when OpNum exceeds
the number of elements in Record, like in the attached bitcode file.

The test case was generated by clusterfuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=15698

Reviewers: t.p.northover, thegameg, jfb

Reviewed By: jfb

Differential Revision: https://reviews.llvm.org/D64507

llvm-svn: 365750
2019-07-11 09:57:00 +00:00
Sam Parker
e530ac4f23 [ARM][LowOverheadLoops] Correct offset checking
This patch addresses a couple of problems:
1) The maximum supported offset of LE is -4094.
2) The offset of WLS also needs to be checked, this uses a
   maximum positive offset of 4094.
    
The use of BasicBlockUtils has been changed because the block offsets
weren't being initialised, but the isBBInRange checks both positive
and negative offsets.
    
ARMISelLowering has been tweaked because the test case presented
another pattern that we weren't supporting.

llvm-svn: 365749
2019-07-11 09:56:15 +00:00
Simon Tatham
4ca501beb1 [ARM] Remove nonexistent unsigned forms of MVE VQDMLAH.
The VQDMLAH.U8, VQDMLAH.U16 and VQDMLAH.U32 instructions don't
actually exist: the Armv8.1-M architecture spec only lists signed
forms of that instruction. The unsigned ones were added in error: they
existed in an early draft of the spec, but they were removed before
the public version, and we missed that particular spec change.

Also affects the variant forms VQDMLASH, VQRDMLAH and VQRDMLASH.

Reviewers: miyuki

Subscribers: javed.absar, kristof.beyls, hiraditya, dmgreen, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64502

llvm-svn: 365747
2019-07-11 09:52:15 +00:00
Kai Luo
69b9b8146f [NFC][PowerPC] Added test to track current behaviour of TailDup
llvm-svn: 365746
2019-07-11 09:43:03 +00:00
Petar Avramovic
cc9f916387 [MIPS GlobalISel] Skip copies in addUseDef and addDefUses
Skip copies between virtual registers during search for UseDefs
and DefUses.
Since each operand has one def search for UseDefs is straightforward.
But since operand can have many uses, we have to check all uses of
each copy we traverse during search for DefUses.

Differential Revision: https://reviews.llvm.org/D64486

llvm-svn: 365744
2019-07-11 09:28:34 +00:00
Petar Avramovic
d77593d28b [MIPS GlobalISel] RegBankSelect for chains of ambiguous instructions
When one of the uses/defs of ambiguous instruction is also ambiguous
visit it recursively and search its uses/defs for instruction with
only one mapping available.
When all instruction in a chain are ambiguous arbitrary mapping can
be selected. For s64 operands in ambiguous chain fprb is selected since
it results in less instructions then having to narrow scalar s64 to s32.
For s32 both gprb and fprb result in same number of instructions and
gprb is selected like a general purpose option.

At the moment we always avoid cross register bank copies.
TODO: Implement a model for costs calculations of different mappings
on same instruction and cross bank copies. Allow cross bank copies
when appropriate according to cost model.

Differential Revision: https://reviews.llvm.org/D64485

llvm-svn: 365743
2019-07-11 09:22:49 +00:00