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74f5327e53
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1141 Commits

Author SHA1 Message Date
Evan Cheng
74f5327e53 We don't need separate thumb1 instructions tADDSi3 etc. for addc and subc. The "normal" version always modify condition register CPSR so we should just use def : pat to match to the same instructions. 
llvm-svn: 75219
 2009-07-10 02:09:04 +00:00
Evan Cheng
24f2aefc87 Add a thumb2 pass to insert IT blocks. 
llvm-svn: 75218
 2009-07-10 01:54:42 +00:00
Evan Cheng
4d2678d1ff Move isPredicated from .cpp to .h 
llvm-svn: 75217
 2009-07-10 01:38:27 +00:00
Evan Cheng
5bdb67db63 80 col violation. 
llvm-svn: 75212
 2009-07-10 00:45:16 +00:00
Evan Cheng
4249ad4c00 Remove a bogus assertion. 
llvm-svn: 75206
 2009-07-10 00:23:48 +00:00
Bob Wilson
3309c912fb Replace TM.getRegisterInfo() calls by TRI instance variable. 
Use getAsmName() method instead of accessing AsmName field directly.

llvm-svn: 75205
 2009-07-10 00:14:05 +00:00
Bob Wilson
f5f52fa9d6 Handle 'a' modifier on inline assembly operands. 
This is part of the fix for pr4521.

llvm-svn: 75201
 2009-07-09 23:54:51 +00:00
Evan Cheng
1b15e9611e Added Thumb IT instruction. 
llvm-svn: 75198
 2009-07-09 23:43:36 +00:00
Evan Cheng
0d509459ff Another todo entry. 
llvm-svn: 75192
 2009-07-09 23:17:28 +00:00
Evan Cheng
5bde39cb50 Initial support for load / store multiple opt pass Thumb2 support (post-allocation only). It's kind of there, but not quite. I'll return to this later. 
llvm-svn: 75190
 2009-07-09 23:11:34 +00:00
Evan Cheng
57a4e81f3f Fix ldm / stm unified syntax; add t2LDM_RET. 
llvm-svn: 75188
 2009-07-09 22:58:39 +00:00
Evan Cheng
09e7791563 LDM_RET should be marked mayLoad. 
llvm-svn: 75187
 2009-07-09 22:57:41 +00:00
Evan Cheng
3b7c3fafab Fix ldrd / strd address mode matching code. It allows for +/- 8 bit offset. Also change the printer to make the scale 4 explicit. 
Note, we are not yet generating these instructions.

llvm-svn: 75181
 2009-07-09 22:21:59 +00:00
Evan Cheng
7f8e728a54 Add a Thumb readme entry. 
llvm-svn: 75173
 2009-07-09 20:50:52 +00:00
Evan Cheng
e08efed97a Correct comment. 
llvm-svn: 75172
 2009-07-09 20:40:44 +00:00
David Goodwin
6c4201dbcb Handle Thumb-2 addressing modes during FP elimination. 
llvm-svn: 75158
 2009-07-09 18:35:52 +00:00
Owen Anderson
8970999512 Thread LLVMContext through MVT and related parts of SDISel. 
llvm-svn: 75153
 2009-07-09 17:57:24 +00:00
Evan Cheng
fad8f9bea1 Reorg includes. 
llvm-svn: 75115
 2009-07-09 06:49:09 +00:00
David Goodwin
49fbd8d6b7 Use common code for both ARM and Thumb-2 instruction and register info. 
llvm-svn: 75067
 2009-07-08 23:10:31 +00:00
Evan Cheng
991f885915 - Add some NEON ld / st instruction static encoding. 
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.

llvm-svn: 75065
 2009-07-08 22:51:32 +00:00
Evan Cheng
ef49d9c75b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. 
llvm-svn: 75048
 2009-07-08 21:03:57 +00:00
Torok Edwin
4df7c24e06 Missed an exit during the conversion. 
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.

llvm-svn: 75045
 2009-07-08 20:55:50 +00:00
Torok Edwin
358888da3a Implement changes from Chris's feedback. 
Finish converting lib/Target.

llvm-svn: 75043
 2009-07-08 20:53:28 +00:00
Bob Wilson
8d4a8b9370 Implement NEON vst1 instruction. 
llvm-svn: 75037
 2009-07-08 20:32:02 +00:00
David Goodwin
94209a4c31 Generalize opcode selection in ARMBaseRegisterInfo. 
llvm-svn: 75036
 2009-07-08 20:28:28 +00:00
Xerxes Ranby
626b0317a9 Fix cmake build. 
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt

llvm-svn: 75035
 2009-07-08 20:13:41 +00:00
David Goodwin
c571c4b457 Push methods into base class in preparation for sharing. 
llvm-svn: 75020
 2009-07-08 18:31:39 +00:00
Bob Wilson
3809b333de Implement NEON vld1 instructions. 
llvm-svn: 75019
 2009-07-08 18:11:30 +00:00
Torok Edwin
ad3be984b7 Start converting to new error handling API. 
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)

llvm-svn: 75018
 2009-07-08 18:01:40 +00:00
David Goodwin
7b4570ee1d Start breaking out common base functionality for register info. 
llvm-svn: 75016
 2009-07-08 17:28:55 +00:00
David Goodwin
5bdef4b3f7 Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
llvm-svn: 75010
 2009-07-08 16:09:28 +00:00
Nick Lewycky
d46a7b2d22 Remove the vicmp and vfcmp instructions. Because we never had a release with 
these instructions, no autoupgrade or backwards compatibility support is
provided.

llvm-svn: 74991
 2009-07-08 03:04:38 +00:00
Evan Cheng
18d70ca551 Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant. 
llvm-svn: 74988
 2009-07-08 01:46:35 +00:00
Evan Cheng
51549009b4 Add a todo. 
llvm-svn: 74976
 2009-07-08 00:05:05 +00:00
Evan Cheng
835946d309 Also statically set bit 25 for BR_JT instructions. 
llvm-svn: 74974
 2009-07-07 23:45:10 +00:00
Evan Cheng
834ee3625c Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan. 
llvm-svn: 74972
 2009-07-07 23:40:25 +00:00
Evan Cheng
393e38e44b Add Thumb2 movcc instructions. 
llvm-svn: 74946
 2009-07-07 20:39:03 +00:00
Evan Cheng
409ea11513 Add BX and BXr9 encodings. Patch by Sean Callanan. 
llvm-svn: 74938
 2009-07-07 19:16:24 +00:00
Evan Cheng
fa864ab886 Add Thumb2 pkhbt / pkhtb. 
llvm-svn: 74895
 2009-07-07 05:35:52 +00:00
Evan Cheng
46b98516f6 Add some more Thumb2 multiplication instructions. 
llvm-svn: 74889
 2009-07-07 01:17:28 +00:00
Evan Cheng
3d69bea38e 80 col violation. 
llvm-svn: 74888
 2009-07-07 01:16:41 +00:00
Evan Cheng
b70366baa4 isThumb2 really should mean thumb2 only, not thumb2+. 
llvm-svn: 74871
 2009-07-06 22:29:14 +00:00
Evan Cheng
5a279bb4b2 Add bfc to armv6t2. 
llvm-svn: 74868
 2009-07-06 22:23:46 +00:00
Evan Cheng
2570d8b541 Added ARM::mls for armv6t2. 
llvm-svn: 74866
 2009-07-06 22:05:45 +00:00
Bruno Cardoso Lopes
38373542a1 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some 
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
 2009-07-06 05:09:34 +00:00
Tilmann Scheller
cea3c16aa5 Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call. 
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put 
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.

The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.

llvm-svn: 74764
 2009-07-03 06:44:53 +00:00
Evan Cheng
f20e4fba49 Add thumb2 sign / zero extend with rotate instructions. 
llvm-svn: 74755
 2009-07-03 01:43:10 +00:00
Evan Cheng
f3672575d6 Add Thumb2 load / store multiple instructions. Not used yet. 
llvm-svn: 74749
 2009-07-03 00:18:36 +00:00
Evan Cheng
07bcde3709 t2LDR_PRE etc are loads. 
llvm-svn: 74741
 2009-07-03 00:08:19 +00:00
Evan Cheng
162bd9cead Added indexed stores. 
llvm-svn: 74740
 2009-07-03 00:06:39 +00:00