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6175 Commits

Author SHA1 Message Date
Sam Bishop
752e0f8fad Make a note of the fact that EmitOwnedPtr() has nothing to do with the 
OwningPtr<> class.

llvm-svn: 48763
 2008-03-25 04:41:18 +00:00
Owen Anderson
e540be453a Revert r48676. I had plans for using it, but now it's just dead code. 
llvm-svn: 48743
 2008-03-24 21:29:58 +00:00
Dan Gohman
a55da994b0 Remove an unnecessary #include. 
llvm-svn: 48729
 2008-03-24 16:58:44 +00:00
Dan Gohman
fec60bb357 Shrink the size of AllocationInst by using its SubclassData 
field to store the alignment value instead of haing a
separate field.

llvm-svn: 48727
 2008-03-24 16:55:58 +00:00
Evan Cheng
d01a2a18f8 Increasing the inline limit from (overly conservative) 200 to 300. Given each BB costs 20 and each instruction costs 5, 200 means a 4 BB function + 24 instructions (actually less because caller's size also contributes to it). 
Furthermore, double the limit when more than 10% of the callee instructions are vector instructions. Multimedia kernels tend to love inlining.

llvm-svn: 48725
 2008-03-24 06:37:48 +00:00
Anton Korobeynikov
bd6711c1c9 Use C-style comments :) 
llvm-svn: 48705
 2008-03-23 13:44:17 +00:00
Anton Korobeynikov
261bddcbeb Add first proof-of-concept universal compiler driver framework based 
on ideas mentioned in PR686.
Written by Mikhail Glushenkov and contributed by Codedgers, Inc.

Old llvmc will be removed soon after new one will have all its properties.

llvm-svn: 48699
 2008-03-23 08:57:20 +00:00
Anton Korobeynikov
f858d272a8 Typo fixes 
llvm-svn: 48681
 2008-03-22 07:48:08 +00:00
Owen Anderson
de2d3aca1b Add a comment, and fix a bug where AllocateRW recurred to AllocateRWX instead of itself. 
llvm-svn: 48677
 2008-03-22 02:59:54 +00:00
Owen Anderson
5654dda62c Add an AllocateRW to match AllocateRWX. 
llvm-svn: 48676
 2008-03-22 02:33:53 +00:00
Evan Cheng
874aee2eec Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE. 
llvm-svn: 48673
 2008-03-22 01:55:50 +00:00
Dan Gohman
a363ba510c Don't include <map> in Pass.h, which doesn't need it. This requires 
adding <map> to many files that actually do need it.

llvm-svn: 48667
 2008-03-21 23:51:57 +00:00
Dan Gohman
479c8ef76d Specialize FORCE_DEFINING_FILE_TO_BE_LINKED using a GCC trick 
to avoid using constructor calls for static objects. This reduces
the number of objects requiring static constructors in a typical
LLVM build by around 20%.

llvm-svn: 48665
 2008-03-21 23:38:23 +00:00
Andrew Lenharth
2ff2bcbde8 FunctionExtractorPass has been superceded by GVExtractorPass 
llvm-svn: 48648
 2008-03-21 16:46:53 +00:00
Duncan Sands
a53967843f Make it possible to get an empty struct using 
the new StructType::get method.  The second NULL
is to pacify the gcc warning mechanism.  This
patch compiles but is otherwise untested.

llvm-svn: 48645
 2008-03-21 15:53:17 +00:00
Duncan Sands
4153fc30c9 Introduce a new node for holding call argument 
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
 2008-03-21 09:14:45 +00:00
Evan Cheng
4ae9fee64c Undo 48570. Correctly match mmx shift instructions with an immediate operand. 
llvm-svn: 48627
 2008-03-21 00:40:09 +00:00
Nick Lewycky
3903f2f24e ubyte and sbyte? what are those? 
llvm-svn: 48585
 2008-03-20 06:19:51 +00:00
Evan Cheng
6f729b2820 Add intrinsics to match mmx shift builtin's with immediate operand. 
llvm-svn: 48569
 2008-03-19 23:38:52 +00:00
Devang Patel
5e8cbbea65 PassInfo keep tracks whether a pass is an analysis pass or not. 
llvm-svn: 48554
 2008-03-19 21:56:59 +00:00
Duncan Sands
486fdbb67f Fix comment. 
llvm-svn: 48543
 2008-03-19 10:59:59 +00:00
Chris Lattner
1642451cf7 add some convenience methods for creating GEP instructions and 
struct types.  Patch by David Chisnall, with some tweaks.

llvm-svn: 48531
 2008-03-19 05:06:05 +00:00
Evan Cheng
3d9309c11d Fix live variables issues: 
1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue.
2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register:
   = EAX, AX<imp-use,kill>
...
AX =
In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things.

llvm-svn: 48521
 2008-03-19 00:52:20 +00:00
Devang Patel
38f181fa8c Do not use virtual function to identify an analysis pass. 
llvm-svn: 48520
 2008-03-19 00:48:41 +00:00
Scott Michel
889ee011f7 Dial down gcc's warnings: don't use 0UL when 0U suffices (and when the 
variables and methods themselves only use unsigned.)

llvm-svn: 48492
 2008-03-18 16:55:06 +00:00
Dale Johannesen
4d0221c45b Get rid of compilation warnings. Per Devang. 
llvm-svn: 48478
 2008-03-18 01:52:17 +00:00
Devang Patel
811ca3ddba Identify Analysis pass. 
Do not run analysis pass again if analysis info is still available.
This fixes PR1441.

llvm-svn: 48476
 2008-03-18 00:39:19 +00:00
Nate Begeman
f50ef51ded __builtin_ia32_movntdqa reads memory 
llvm-svn: 48431
 2008-03-16 21:15:47 +00:00
Christopher Lamb
b4f4b41048 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. 
llvm-svn: 48412
 2008-03-16 03:12:01 +00:00
Evan Cheng
9af68f56c5 Remove isImplicitDef TargetInstrDesc flag. 
llvm-svn: 48381
 2008-03-15 00:19:36 +00:00
Evan Cheng
11d2c09adc Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 
llvm-svn: 48380
 2008-03-15 00:03:38 +00:00
Gabor Greif
6ff874e81c move the Use destructor where it belongs to 
llvm-svn: 48376
 2008-03-14 22:03:02 +00:00
Evan Cheng
b49600c090 Back out r48353. Not needed. 
llvm-svn: 48375
 2008-03-14 22:01:01 +00:00
Chris Lattner
b549d83ca6 Restore this member, which is used on win32. 
llvm-svn: 48372
 2008-03-14 21:17:54 +00:00
Dan Gohman
37a26f973f Update comments; getPassName no longer uses RTTI. 
llvm-svn: 48369
 2008-03-14 18:27:04 +00:00
Dan Gohman
9ca724cee0 Move the PMStack class out of Pass.h and into PassManagers.h. 
llvm-svn: 48367
 2008-03-14 18:14:29 +00:00
Evan Cheng
98eaed9fbc Add an MO_Undef MachineOperandType, intended for INSERT_SUBREG. Next up MO_Undead. 
llvm-svn: 48353
 2008-03-14 01:47:49 +00:00
Evan Cheng
d466e7a521 Forgot this. 
llvm-svn: 48349
 2008-03-14 00:17:29 +00:00
Dan Gohman
89e8681ac5 Fix a typo in a comment. 
llvm-svn: 48345
 2008-03-13 23:04:27 +00:00
Devang Patel
2c38efe128 Remove unused GetAddressOfSymbol() 
Thanks Daniel Dunbar!

llvm-svn: 48340
 2008-03-13 16:55:34 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. 
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
 2008-03-13 05:47:01 +00:00
Chris Lattner
a14cdebdd9 move a bunch of trivial methods to be inline. 
llvm-svn: 48326
 2008-03-13 05:00:21 +00:00
Chris Lattner
d4a9aafc3f Various improvements suggested by Duncan 
llvm-svn: 48325
 2008-03-13 04:33:03 +00:00
Evan Cheng
a3b56a661c Improve VarInfo::removeKill() by using std::find instead of linear search. 
llvm-svn: 48321
 2008-03-13 02:42:55 +00:00
Dan Gohman
abf6c9aa1d Change PMTopLevelManager's PassManagers vector element type from 
Pass* to PMDataManager*. PMDataManager is more specific than Pass,
so this more accurately describes the objects that are being stored.

This eliminates the need for several dynamic_casts to PMDataManager*.
It does introduce one dynamic_cast though, in dumpPasses(). Give
this one a comment describing why a dynamic_cast is being used.

llvm-svn: 48315
 2008-03-13 01:48:32 +00:00
Dan Gohman
70f4b55e3f Change PMStack::push to accept a PMDataManager* instead of 
a Pass*. PMDataManager* is what it actually holds, so this
makes it clearer.

llvm-svn: 48314
 2008-03-13 01:21:31 +00:00
Dan Gohman
6c18f26790 Fix a typo in a comment. 
llvm-svn: 48313
 2008-03-13 01:08:50 +00:00
Dan Gohman
339b887ff6 No need for typedefs with enums in C++. 
llvm-svn: 48312
 2008-03-13 01:07:53 +00:00
Evan Cheng
b9fc5d6d07 Refactor some code out of MachineSink into a MachineInstr query. 
llvm-svn: 48311
 2008-03-13 00:44:09 +00:00
Evan Cheng
620fd19798 Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: 
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!

llvm-svn: 48307
 2008-03-12 22:19:41 +00:00