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84057 Commits

Author SHA1 Message Date
Craig Topper
62ece8c8d5 Tidy up trailing whitespace
llvm-svn: 161027
2012-07-31 04:58:05 +00:00
Craig Topper
676ae779ef Tidy up trailing whitespace
llvm-svn: 161026
2012-07-31 04:38:27 +00:00
Chandler Carruth
49c1558722 Clean up trailing whitespace and unnecessary blank lines.
llvm-svn: 161025
2012-07-31 04:13:57 +00:00
Chandler Carruth
58525185d2 Bring TinyPtrVector under test. Somehow we never picked up unit tests
for this class. These tests exercise most of the basic properties, but
the API for TinyPtrVector is very strange currently. My plan is to start
fleshing out the API to match that of SmallVector, but I wanted a test
for what is there first.

Sadly, it doesn't look reasonable to just re-use the SmallVector tests,
as this container can only ever store pointers, and much of the
SmallVector testing is to get construction and destruction right.

Just to get this basic test working, I had to add value_type to the
interface.

While here I found a subtle bug in the combination of 'erase', 'begin',
and 'end'. Both 'begin' and 'end' wanted to use a null pointer to
indicate the "end" iterator of an empty vector, regardless of whether
there is actually a vector allocated or the pointer union is null.
Everything else was fine with this except for erase. If you erase the
last element of a vector after it has held more than one element, we
return the end iterator of the underlying SmallVector which need not be
a null pointer. Instead, simply use the pointer, and poniter + size()
begin/end definitions in the tiny case, and delegate to the inner vector
whenever it is present.

llvm-svn: 161024
2012-07-31 02:48:31 +00:00
Jakob Stoklund Olesen
ed1a4d695a Clear kill flags in removeCopyByCommutingDef().
We are extending live ranges, so kill flags are not accurate. They
aren't needed until they are recomputed after RA anyway.

<rdar://problem/11950722>

llvm-svn: 161023
2012-07-31 02:47:24 +00:00
Manman Ren
3769ac64a6 Reverse order of the two branches at end of a basic block if it is profitable.
We branch to the successor with higher edge weight first.
Convert from
     je    LBB4_8  --> to outer loop
     jmp   LBB4_14 --> to inner loop
to
     jne   LBB4_14
     jmp   LBB4_8

PR12750
rdar: 11393714

llvm-svn: 161018
2012-07-31 01:11:07 +00:00
Andrew Trick
2773dbddf3 Use the latest MachineRegisterInfo APIs. No functionality.
llvm-svn: 161010
2012-07-30 23:48:17 +00:00
Andrew Trick
e2a84de962 Added MachineRegisterInfo::hasOneDef()
llvm-svn: 161009
2012-07-30 23:48:14 +00:00
Andrew Trick
dc8c12f62b Inline MachineRegisterInfo::hasOneUse
llvm-svn: 161007
2012-07-30 23:48:12 +00:00
Chandler Carruth
54e2274160 Extend the InstVisitor to visit the specialized classes wrapping
CallInst for intrinsics. This allows users of the InstVisitor that would
like to special case certain very common intrinsics to do so naturally
in keeping with the type hierarchy's utility classes.

llvm-svn: 161006
2012-07-30 23:45:06 +00:00
Jakob Stoklund Olesen
12a22d4f0f Avoid looking at stale data in verifyAnalysis().
llvm-svn: 161004
2012-07-30 23:15:12 +00:00
Jakob Stoklund Olesen
a9e1543215 Allow traces to enter nested loops.
This lets traces include the final iteration of a nested loop above the
center block, and the first iteration of a nested loop below the center
block.

We still don't allow traces to contain backedges, and traces are
truncated where they would leave a loop, as seen from the center block.

llvm-svn: 161003
2012-07-30 23:15:10 +00:00
Jim Grosbach
51fff56d58 Keep empty assembly macro argument values in the middle of the list.
Empty macro arguments at the end of the list should be as-if not specified at
all, but those in the middle of the list need to be kept so as not to screw
up the positional numbering. E.g.:
.macro foo
foo_-bash___:
  nop
.endm

foo 1, 2, 3, 4
foo 1, , 3, 4

Should create two labels, "foo_1_2_3_4" and "foo_1__3_4".

rdar://11948769

llvm-svn: 161002
2012-07-30 22:44:17 +00:00
Chandler Carruth
a15888ba2d Move the SmallVector unit tests to be type-parameterized so that we can
test more than a single instantiation of SmallVector.

Add testing for 0, 1, 2, and 4 element sized "small" buffers. These
appear to be essentially untested in the unit tests until now.

Fix several tests to be robust in the face of a '0' small buffer. As
a consequence of this size buffer, the growth patterns are actually
observable in the test -- yes this means that many tests never caused
a grow to occur before. For some tests I've merely added a reserve call
to normalize behavior. For others, the growth is actually interesting,
and so I captured the fact that growth would occur and adjusted the
assertions to not assume how rapidly growth occured.

Also update the specialization for a '0' small buffer length to have all
the same interface points as the normal small vector.

llvm-svn: 161001
2012-07-30 22:17:52 +00:00
Jakob Stoklund Olesen
e9523d88c3 Clarify invalidation strategy in comment.
llvm-svn: 160997
2012-07-30 21:16:22 +00:00
Nick Lewycky
ec7899b258 Fix grammar-o. Fixes PR13482!
llvm-svn: 160996
2012-07-30 21:10:51 +00:00
Jakob Stoklund Olesen
2a129fa92c Assert that all trace candidate blocks have been visited by the PO.
When computing a trace, all the candidates for pred/succ must have been
visited. Filter out back-edges first, though. The PO traversal ignores
them.

Thanks to Andy for spotting this in review.

llvm-svn: 160995
2012-07-30 21:10:27 +00:00
Jakob Stoklund Olesen
d91215215c Hook into PassManager's analysis verification.
By overriding Pass::verifyAnalysis(), the pass contents will be verified
by the pass manager.

llvm-svn: 160994
2012-07-30 20:57:50 +00:00
Pete Cooper
e45da564cf Consider address spaces for hashing and CSEing DAG nodes. Otherwise two loads from different x86 segments but the same address would get CSEd
llvm-svn: 160987
2012-07-30 20:23:19 +00:00
Eric Christopher
91d4c0078f Typo.
llvm-svn: 160981
2012-07-30 20:09:37 +00:00
Kevin Enderby
cde92a2741 Fix a bug in ARMMachObjectWriter::RecordRelocation() in ARMMachObjectWriter.cpp
where the other_half of the movt and movw relocation entries needs to get set
and only with the 16 bits of the other half.

rdar://10038370

llvm-svn: 160978
2012-07-30 18:46:15 +00:00
Jakob Stoklund Olesen
7bbe0b0328 Add MachineInstr::isTransient().
This is a cleaned up version of the isFree() function in
MachineTraceMetrics.cpp.

Transient instructions are very unlikely to produce any code in the
final output. Either because they get eliminated by RegisterCoalescing,
or because they are pseudo-instructions like labels and debug values.

llvm-svn: 160977
2012-07-30 18:34:14 +00:00
Jakob Stoklund Olesen
c3b8765d57 Add MachineTraceMetrics::verify().
This function verifies the consistency of cached data in the
MachineTraceMetrics analysis.

llvm-svn: 160976
2012-07-30 18:34:11 +00:00
Jakob Stoklund Olesen
6653a31973 Verify that the CFG hasn't changed during invalidate().
The MachineTraceMetrics analysis must be invalidated before modifying
the CFG. This will catch some of the violations of that rule.

llvm-svn: 160969
2012-07-30 17:36:49 +00:00
Jakob Stoklund Olesen
4f3254f73c Add MachineBasicBlock::isPredecessor().
A->isPredecessor(B) is the same as B->isSuccessor(A), but it can
tolerate a B that is null or dangling. This shouldn't happen normally,
but it it useful for verification code.

llvm-svn: 160968
2012-07-30 17:36:47 +00:00
Nadav Rotem
1fbb339620 When constant folding GEP expressions, keep the address space information of pointers.
Together with Ran Chachick <ran.chachick@intel.com>

llvm-svn: 160954
2012-07-30 07:25:20 +00:00
Craig Topper
f374fd0e17 Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoad
llvm-svn: 160953
2012-07-30 07:14:07 +00:00
Craig Topper
19fc5055ea Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code.
llvm-svn: 160951
2012-07-30 06:48:11 +00:00
Craig Topper
63cf938ced Remove some unnecessary filter checks. They were already covered by IsCodeGenOnly
llvm-svn: 160950
2012-07-30 06:27:19 +00:00
Craig Topper
f02d9cd605 Remove check for sub class of X86Inst from filter function since caller guaranteed it. Replace another sub class check with ShouldBeEmitted flag since it was factored in there already.
llvm-svn: 160949
2012-07-30 05:39:34 +00:00
Craig Topper
a78fdabf13 Simplify code that filtered certain instructions in two different ways. No functional change.
llvm-svn: 160948
2012-07-30 05:10:05 +00:00
Craig Topper
5e5b8cbcd3 Remove check for f256mem from has256BitOperands as nothing depended on it and it isn't the only 256-bit memory type anyway.
llvm-svn: 160946
2012-07-30 04:53:00 +00:00
Craig Topper
8afab784a4 Remove trailing whitespace.
llvm-svn: 160945
2012-07-30 04:48:12 +00:00
Craig Topper
80fdfb7f56 Give VCVTTPD2DQ priority over CVTTPD2DQ.
llvm-svn: 160942
2012-07-30 02:20:32 +00:00
Craig Topper
492a7af190 Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.
llvm-svn: 160941
2012-07-30 02:14:02 +00:00
Craig Topper
9050c15c71 Fix up patterns for VCVTSS2SD. Specifically give it priority over SSE form. Add an OptForSpeed to explicitly pair up with an OptForSize that was already on another pattern.
llvm-svn: 160939
2012-07-30 01:38:57 +00:00
Craig Topper
147248a6a0 Fix load types on intrinsic forms of SS2SD and SD2SS AVX/SSE convert instruction patterns.
llvm-svn: 160938
2012-07-29 23:26:34 +00:00
Craig Topper
293e781ba6 Move more SSE/AVX convert instruction patterns into their definitions.
llvm-svn: 160937
2012-07-29 22:30:06 +00:00
Benjamin Kramer
42c85ae9d5 APInt: Simplify code.
No functionality change.

llvm-svn: 160929
2012-07-29 12:33:29 +00:00
Manman Ren
ceef7c4d9b Revert r160920 and r160919 due to dragonegg and clang selfhost failure
llvm-svn: 160927
2012-07-29 02:44:09 +00:00
Nick Lewycky
a1eb0b5f2e Add testcases for GlobalOpt changes in r160693 and r160757.
llvm-svn: 160925
2012-07-29 01:15:37 +00:00
Craig Topper
e75418242a Fold patterns for some of the SSE/AVX convert instructions into their instruction definitions.
llvm-svn: 160922
2012-07-28 18:59:19 +00:00
Craig Topper
189349dab2 Mark some of the SSE/AVX convert instructions as mayLoad/neverHasSideEffects.
llvm-svn: 160921
2012-07-28 18:36:39 +00:00
Manman Ren
9494d0a2c2 X86 Peephole: fold loads to the source register operand if possible.
Trying to fix the bot by specifying a triple in the failing testing cases.

llvm-svn: 160920
2012-07-28 17:51:24 +00:00
Manman Ren
ea77f9076b X86 Peephole: fold loads to the source register operand if possible.
Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.

rdar://10554090 and rdar://11873276

llvm-svn: 160919
2012-07-28 16:48:01 +00:00
Craig Topper
3c15b4afd4 Make CVTSS2SI instruction definition consistent with CVTSD2SI.
llvm-svn: 160914
2012-07-28 08:28:23 +00:00
Craig Topper
8121932592 Fix up memory load types for SSE scalar convert intrinsic patterns.
llvm-svn: 160913
2012-07-28 07:59:59 +00:00
Manman Ren
fbc9fcdbf2 X86 Peephole: fix PR13475 in optimizeCompare.
It is possible that an instruction can use and update EFLAGS.
When checking the safety, we should check the usage of EFLAGS first before
declaring it is safe to optimize due to the update.

llvm-svn: 160912
2012-07-28 03:15:46 +00:00
Andrew Trick
0320969afa Reenable a basic SSA DAG builder optimization.
Jakob fixed ProcessImplicifDefs in r159149.

llvm-svn: 160910
2012-07-28 01:48:15 +00:00
Jakob Stoklund Olesen
0eacb18967 Add more debug output to MachineTraceMetrics.
llvm-svn: 160905
2012-07-27 23:58:38 +00:00