2 Commits

Author	SHA1	Message	Date
Kalle Raiskila	e2c0e66ff1	Have SPU handle halfvec stores aligned by 8 bytes. ... llvm-svn: 110576	2010-08-09 16:33:00 +00:00
Chris Lattner	c0d5bcc160	From Kalle Raiskila: ... "the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions: -in vararg handling, registers are marked to be live, to not confuse the register scavenger -function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the register scavenger emergency spill slot, which is not used as there is no stack." llvm-svn: 99819	2010-03-29 17:38:47 +00:00