Evan Cheng
fa864ab886
Add Thumb2 pkhbt / pkhtb.
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llvm-svn: 74895
2009-07-07 05:35:52 +00:00
Evan Cheng
46b98516f6
Add some more Thumb2 multiplication instructions.
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llvm-svn: 74889
2009-07-07 01:17:28 +00:00
Evan Cheng
5a279bb4b2
Add bfc to armv6t2.
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llvm-svn: 74868
2009-07-06 22:23:46 +00:00
Evan Cheng
f20e4fba49
Add thumb2 sign / zero extend with rotate instructions.
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llvm-svn: 74755
2009-07-03 01:43:10 +00:00
Evan Cheng
f3672575d6
Add Thumb2 load / store multiple instructions. Not used yet.
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llvm-svn: 74749
2009-07-03 00:18:36 +00:00
Evan Cheng
07bcde3709
t2LDR_PRE etc are loads.
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llvm-svn: 74741
2009-07-03 00:08:19 +00:00
Evan Cheng
162bd9cead
Added indexed stores.
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llvm-svn: 74740
2009-07-03 00:06:39 +00:00
Evan Cheng
fcab8e743a
Sign extending pre/post indexed loads.
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llvm-svn: 74736
2009-07-02 23:16:11 +00:00
Evan Cheng
dad6a41d14
Thumb2 pre/post indexed loads.
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llvm-svn: 74696
2009-07-02 07:28:31 +00:00
Evan Cheng
57bb186a0c
Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate.
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llvm-svn: 74692
2009-07-02 06:38:40 +00:00
David Goodwin
19aa5c7d51
Add PIC load and store patterns for Thumb-2.
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llvm-svn: 74577
2009-07-01 00:01:13 +00:00
David Goodwin
aa1f876954
Thumb-2 load and store double description. But nothing yet creates them.
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llvm-svn: 74566
2009-06-30 22:50:01 +00:00
David Goodwin
5805e9aef5
Add thumb-2 store word, halfword, and byte.
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llvm-svn: 74555
2009-06-30 22:11:34 +00:00
David Goodwin
aad223dd8a
Improve Thumb-2 jump table support.
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llvm-svn: 74549
2009-06-30 19:50:22 +00:00
David Goodwin
5545d82866
Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table.
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llvm-svn: 74543
2009-06-30 18:04:13 +00:00
Evan Cheng
2a527c3419
A few more load instructions.
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llvm-svn: 74500
2009-06-30 02:15:48 +00:00
David Goodwin
4f53387d26
Add Thumb-2 support for TEQ amd TST.
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llvm-svn: 74468
2009-06-29 22:49:42 +00:00
David Goodwin
9e1280adf3
Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
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llvm-svn: 74423
2009-06-29 15:33:01 +00:00
Evan Cheng
093adf3ff9
Implement Thumb2 ldr.
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After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.
llvm-svn: 74420
2009-06-29 07:51:04 +00:00
Evan Cheng
817712377a
Renaming for consistency.
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llvm-svn: 74368
2009-06-27 02:26:13 +00:00
David Goodwin
e1979dfbf5
Remove outdated comment.
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llvm-svn: 74357
2009-06-26 23:39:02 +00:00
David Goodwin
90fc344e41
When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not.
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llvm-svn: 74355
2009-06-26 23:13:13 +00:00
David Goodwin
9da977f216
Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
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llvm-svn: 74321
2009-06-26 20:45:56 +00:00
David Goodwin
46eb5a7a2d
ADC used to implement adde should use "adcs" opcode instead of "adc".
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llvm-svn: 74293
2009-06-26 18:07:25 +00:00
David Goodwin
877790aa5f
Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
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Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.
llvm-svn: 74288
2009-06-26 16:10:07 +00:00
Evan Cheng
4f0e461e97
Mark a bunch of instructions commutable.
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llvm-svn: 74237
2009-06-26 00:19:44 +00:00
Evan Cheng
4ac765118d
Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
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llvm-svn: 74228
2009-06-25 23:34:10 +00:00
David Goodwin
74414108e9
Use MVN for ~t2_so_imm immediates.
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llvm-svn: 74223
2009-06-25 23:11:21 +00:00
Evan Cheng
0cced3daa8
ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
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llvm-svn: 74200
2009-06-25 20:59:23 +00:00
Evan Cheng
a3be8cba60
Change thumb2 instruction definitions so if-converter so add predicate operands and / or flip the 's' bit to set the condition flag.
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llvm-svn: 74158
2009-06-25 02:08:06 +00:00
Evan Cheng
e31583bf2a
Add thumb2 add sp.
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llvm-svn: 74156
2009-06-25 01:21:30 +00:00
Evan Cheng
e8c58ee743
Add Thumb2 pc relative add.
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llvm-svn: 74141
2009-06-24 23:47:58 +00:00
Evan Cheng
4dcc3bd23b
Test instructions operands were printed in the wrong order.
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llvm-svn: 73990
2009-06-23 19:56:37 +00:00
Evan Cheng
eaad82627b
Proper patterns for thumb2 shift and rotate instructions.
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llvm-svn: 73987
2009-06-23 19:39:13 +00:00
Evan Cheng
b7077f2943
Rename SelectShifterOperand to SelectThumb2ShifterOperandReg.
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llvm-svn: 73975
2009-06-23 18:14:38 +00:00
Evan Cheng
73e4b03dc8
Obvious typo.
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llvm-svn: 73967
2009-06-23 17:54:26 +00:00
Evan Cheng
3e8033f7f7
Initial Thumb2 support. Majority of the work is done by David Goodwin. There are
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also some contribution from Jim Grosbach, Bob Wilson, and Evan Cheng.
I've done my best to consolidate the patches with those that were done by
Viktor Kutuzov and Anton Korzh from Access Softek, Inc. Let me know if missed
anything. I've completely reorganized the thumb2 td file, made more extensive
uses of multiclass, etc.
Test cases will be contributed later after I re-organize what's in svn first.
llvm-svn: 73965
2009-06-23 17:48:47 +00:00
Evan Cheng
92a49d75e4
Replace isTwoAddress with operand constraint.
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llvm-svn: 73947
2009-06-23 05:23:49 +00:00
Anton Korobeynikov
dbb79a8409
Fix asm string from MOVi16
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llvm-svn: 73661
2009-06-17 23:43:36 +00:00
Anton Korobeynikov
7fd29c57a8
Initial support for some Thumb2 instructions.
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Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.
llvm-svn: 73622
2009-06-17 18:13:58 +00:00
Anton Korobeynikov
4f5b1ef545
Add placeholder for thumb2 stuff
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llvm-svn: 72593
2009-05-29 23:41:08 +00:00
