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Commit Graph

5 Commits

Author SHA1 Message Date
Evan Cheng
04762a3cf5 Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588

llvm-svn: 136292
2011-07-27 23:22:03 +00:00
Eli Friedman
35432e5685 Add 3DNowA instructions.
llvm-svn: 115477
2010-10-03 20:23:13 +00:00
Chris Lattner
4599fd89fd add support for the prefetch/prefetchw instructions, move femms into
the right file.  The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.

llvm-svn: 115468
2010-10-03 18:42:30 +00:00
Chris Lattner
6d6f84f99c what the heck, add support for the rest of the 3dNow! binary operations.
llvm-svn: 115467
2010-10-03 18:24:18 +00:00
Chris Lattner
8174253484 Implement support for the bizarre 3DNow! encoding (which is unlike anything
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.

llvm-svn: 115466
2010-10-03 18:08:05 +00:00