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Commit Graph

6895 Commits

Author SHA1 Message Date
Chris Lattner
78271f0596 make a new missing features section
llvm-svn: 35637
2007-04-03 23:41:34 +00:00
Evan Cheng
2cd9df6983 Remove unused constant pool entries.
llvm-svn: 35635
2007-04-03 23:39:48 +00:00
Bill Wendling
ff2c460267 Updated
llvm-svn: 35634
2007-04-03 23:37:20 +00:00
Evan Cheng
db15aa24f9 Fixed a bug that causes codegen of noop like add r0, r0, #0.
llvm-svn: 35627
2007-04-03 21:31:21 +00:00
Nicolas Geoffray
681a87d9e8 Starting implementation of the ELF32 ABI specification of varargs handling.
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625
2007-04-03 13:59:52 +00:00
Nicolas Geoffray
5897c064a6 The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
2007-04-03 12:35:28 +00:00
Nicolas Geoffray
45c3620d12 Addition to the previous commit for getCalleeSavedRegClasses:
"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."

llvm-svn: 35623
2007-04-03 10:57:49 +00:00
Nicolas Geoffray
b7c0895529 The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
2007-04-03 10:27:07 +00:00
Evan Cheng
16696f0ad8 Inverted logic.
llvm-svn: 35619
2007-04-03 06:44:25 +00:00
Bill Wendling
a2eabd50c0 Changed to new MMX_ recipes.
llvm-svn: 35617
2007-04-03 06:18:31 +00:00
Bill Wendling
ca2124e5a9 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them.
llvm-svn: 35616
2007-04-03 06:00:37 +00:00
Chris Lattner
4d702a890c Arm supports negative strides as well, add them. This lets us compile:
CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb

llvm-svn: 35609
2007-04-03 00:13:57 +00:00
Dale Johannesen
e1c3dc7c78 fix off by 1 error in displacement computation
llvm-svn: 35602
2007-04-02 20:31:06 +00:00
Chris Lattner
726d461daf fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales
to be folded into non-store instructions.

llvm-svn: 35601
2007-04-02 18:51:18 +00:00
Chris Lattner
ff9caac83e add support for the 'w' inline asm register class.
llvm-svn: 35598
2007-04-02 17:24:08 +00:00
Chris Lattner
dbce9ef4b8 Fix a bug which caused us to never be able to use signed comparisons for
equality comparisons of a constant.  This allows us to codegen the 'sintzero'
loop in PR1288 as:

LBB1_1: ;cond_next
        li r4, 0
        addi r2, r2, 1
        stw r4, 0(r3)
        addi r3, r3, 4
        cmpwi cr0, r2, -1
        bne cr0, LBB1_1 ;cond_next

instead of:

LBB1_1: ;cond_next
        addi r2, r2, 1
        li r4, 0
        xoris r5, r2, 65535
        stw r4, 0(r3)
        addi r3, r3, 4
        cmplwi cr0, r5, 65535
        bne cr0, LBB1_1 ;cond_next

This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.

llvm-svn: 35590
2007-04-02 05:59:42 +00:00
Lauro Ramos Venancio
7e21418680 - Divides the comparisons in two types: comparisons that only use N and Z
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).

llvm-svn: 35573
2007-04-02 01:30:03 +00:00
Chris Lattner
4fb170e47b fix breakage from last night, simplify code.
llvm-svn: 35560
2007-04-01 20:49:36 +00:00
Evan Cheng
949a34fbad Add i16 address mode.
llvm-svn: 35551
2007-04-01 08:06:46 +00:00
Andrew Lenharth
ff1ff37be9 Readme
llvm-svn: 35533
2007-03-31 15:05:44 +00:00
Anton Korobeynikov
db09256c9f Consistency with native compilers
llvm-svn: 35532
2007-03-31 13:11:52 +00:00
Bill Wendling
8f16f4bf9c Fix comment.
llvm-svn: 35531
2007-03-31 09:36:12 +00:00
Chris Lattner
cea5e599ed add a note
llvm-svn: 35530
2007-03-31 07:06:25 +00:00
Bill Wendling
0cba5d3c15 Match GCC's MMX calling convention.
llvm-svn: 35523
2007-03-31 01:03:53 +00:00
Chris Lattner
c0405a348d implement the new addressing mode description hook.
llvm-svn: 35521
2007-03-30 23:15:24 +00:00
Bill Wendling
503f3e41f6 Add MMX calling conventions.
llvm-svn: 35489
2007-03-30 00:35:22 +00:00
Evan Cheng
526a67c09b New entry.
llvm-svn: 35480
2007-03-29 21:40:13 +00:00
Evan Cheng
3a6b488265 Can't re-materialize mov r, imm in thumb since mov would clobber the condition code.
llvm-svn: 35479
2007-03-29 21:38:31 +00:00
Jeff Cohen
67dbe2064f MS C does have inlining after all, just uses _inline instead of inline.
llvm-svn: 35467
2007-03-29 17:42:21 +00:00
Evan Cheng
bde0409264 Add support for hidden visibility to darwin/arm.
llvm-svn: 35448
2007-03-29 07:49:34 +00:00
Jeff Cohen
9193778f39 Fix C Backend to generate code that works with Microsoft C for the benefit of
front ends that do not depend on the GCC runtime (someday...).

llvm-svn: 35441
2007-03-28 23:08:37 +00:00
Bill Wendling
0549ae5cdb Made this into a bug report: PR1286
llvm-svn: 35439
2007-03-28 19:07:34 +00:00
Anton Korobeynikov
1a8740c88b Oops :)
llvm-svn: 35438
2007-03-28 18:38:33 +00:00
Anton Korobeynikov
d59c4e54c7 Don't allow MatchAddress recurse too much. This trims exponential
behaviour in some cases.

llvm-svn: 35437
2007-03-28 18:36:33 +00:00
Chris Lattner
a710f7442c add a note
llvm-svn: 35435
2007-03-28 18:17:19 +00:00
Chris Lattner
26a37bfd6a Compile CodeGen/X86/lea-3.ll:test2 to:
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret

llvm-svn: 35434
2007-03-28 18:12:31 +00:00
Chris Lattner
1f18012438 Dan pointed out that this is done, remove it!
llvm-svn: 35430
2007-03-28 17:26:52 +00:00
Scott Michel
ae7090641f First test check-in.
llvm-svn: 35429
2007-03-28 17:04:43 +00:00
Evan Cheng
a55449c051 Remove isLegalAddressImmediate.
llvm-svn: 35406
2007-03-28 01:53:55 +00:00
Bill Wendling
e8eccb1684 Remove cruft I put in there...
llvm-svn: 35394
2007-03-28 01:02:54 +00:00
Chris Lattner
9f59529c61 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".

llvm-svn: 35393
2007-03-28 00:58:40 +00:00
Bill Wendling
1087888176 Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.
llvm-svn: 35392
2007-03-28 00:57:11 +00:00
Bill Wendling
6b555c80c0 Add the "unpack low packed data" instructions. This should be the last of
the MMX instructions that are needed...

llvm-svn: 35389
2007-03-27 21:20:36 +00:00
Bill Wendling
d43819da2f Fix so that pandn is emitted instead of an xor/and combo. Add integer
comparison operators.

llvm-svn: 35385
2007-03-27 20:22:40 +00:00
Lauro Ramos Venancio
99fca527d3 "The C standards do say that "char" may either be a "signed char" or "unsigned
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php

llvm-svn: 35382
2007-03-27 16:33:08 +00:00
Lauro Ramos Venancio
8b2e32de5a bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK.
llvm-svn: 35381
2007-03-27 16:19:21 +00:00
Evan Cheng
968135bd3f findRegisterUseOperand() changed.
llvm-svn: 35366
2007-03-26 22:41:48 +00:00
Bill Wendling
8065cc3173 Promote to v1i64 type...
llvm-svn: 35353
2007-03-26 08:03:33 +00:00
Bill Wendling
3c4e130b77 Updated.
llvm-svn: 35352
2007-03-26 07:55:58 +00:00
Bill Wendling
a42484728c Add support for the v1i64 type. This makes better code for this:
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351
2007-03-26 07:53:08 +00:00