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Commit Graph

7 Commits

Author SHA1 Message Date
Eric Christopher
72d7cc25f3 Turn on list-ilp scheduling by default on x86 and x86-64, fix up
testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.

Performance results:

roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated

john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES

Small compile time impact.

llvm-svn: 127208
2011-03-08 02:42:25 +00:00
Chris Lattner
391902aa30 Make the NDEBUG assertion stronger and more clear what is
happening.

Enhance scheduling to set the DEAD flag on implicit defs
more aggressively.  Before, we'd set an implicit def operand
to dead if it were present in the SDNode corresponding to
the machineinstr but had no use.  Now we do it in this case
AND if the implicit def does not exist in the SDNode at all.

This exposes a couple of problems: one is the FIXME, which
causes a live intervals crash on CodeGen/X86/sibcall.ll.
The second is that it makes machinecse and licm more 
aggressive (which is a good thing) but also exposes a case
where licm hoists a set0 and then it doesn't get resunk.

Talking to codegen folks about both these issues, but I need
this patch in in the meantime.

llvm-svn: 99485
2010-03-25 05:40:48 +00:00
Dan Gohman
df2896d609 Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81290
2009-09-08 23:54:48 +00:00
Dan Gohman
ac47a4b9ed Enable the new no-SP register classes by default. This is to address
PR4572. A few tests have some minor code regressions due to different
coalescing.

llvm-svn: 78217
2009-08-05 17:40:24 +00:00
Dan Gohman
437fedf899 Revert changes accidentally committed along with r78163.
llvm-svn: 78165
2009-08-05 05:38:13 +00:00
Dan Gohman
1110fb6bbd Teach X86FastISel how to handle CCValAssign::BCvt, which is used for
MMX arguments. This fixes PR4684.

llvm-svn: 78163
2009-08-05 05:33:42 +00:00
Dan Gohman
3c7e8160f6 Add a new register class to describe operands that can't be SP,
due to x86 encoding restrictions. This is currently off by default
because it may cause code quality regressions. This is for PR4572.

llvm-svn: 77565
2009-07-30 01:56:29 +00:00