RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 07:22:55 +01:00
Code Issues Projects Releases Wiki Activity
96,515 Commits 4 Branches 5 Tags 704 MiB
7ba3455dfc
Commit Graph

2 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
4b4db880a3 Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers." 
Keep the integer_insertelement test case, the new coalescer can handle
this kind of lane insertion without help from pseudo-instructions.

llvm-svn: 166835
 2012-10-26 23:39:46 +00:00
James Molloy
90179e600b Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer. 
llvm-svn: 163298
 2012-09-06 09:16:01 +00:00