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6917 Commits

Author SHA1 Message Date
Bill Wendling
7c50dcd02e Temporarily revert r71010. It was causing massive failures during self-hosting. 
llvm-svn: 71138
 2009-05-07 01:27:25 +00:00
Argyrios Kyrtzidis
0f60e636c0 Make DwarfWriter::RecordInlinedFnStart more like the other DwarfWriter's methods: 
-Have it return a label ID
-Remove the unused Instruction parameter

No functionality change.

llvm-svn: 71132
 2009-05-07 00:16:31 +00:00
Bill Wendling
6e1b018958 - Move some debug fields to coincide with how GCC emits them. No functionality 
change.
- Reformatting.

llvm-svn: 71118
 2009-05-06 21:21:34 +00:00
Evan Cheng
0ee6696fd8 Do not use register as base ptr of pre- and post- inc/dec load / store nodes. 
llvm-svn: 71098
 2009-05-06 18:25:01 +00:00
Oscar Fuentes
24167db5ad CMake: Updated lib/CodeGen/CMakeLists.txt. 
llvm-svn: 71085
 2009-05-06 14:56:40 +00:00
Duncan Sands
938fde7e43 Add generic expansion of SUB when ADD and XOR 
are legal.  Based on a patch by Micah Villmow.

llvm-svn: 71078
 2009-05-06 11:29:50 +00:00
Lang Hames
fcc5ebb1d4 Renamed Spiller classes (plus uses and related files) to VirtRegRewriter. 
llvm-svn: 71057
 2009-05-06 02:36:21 +00:00
Dan Gohman
5e839321f2 If a MachineBasicBlock has multiple ways of reaching another block, 
allow it to have multiple CFG edges to that block. This is needed
to allow MachineBasicBlock::isOnlyReachableByFallthrough to work
correctly. This fixes PR4126.

llvm-svn: 71018
 2009-05-05 21:10:19 +00:00
Evan Cheng
984da04cd0 Enable stack coloring with regs at -O3. 
llvm-svn: 71010
 2009-05-05 20:30:36 +00:00
Chris Lattner
a96ef42a06 Do not require variable debug info nodes to have a compile unit. 
For implicit decls like "self" and "_cmd" in ObjC, these decls
should not have a location.

llvm-svn: 70964
 2009-05-05 04:55:56 +00:00
Evan Cheng
77e14276e0 Do not substitute if the new register isn't in the register class of the operand being updated. 
llvm-svn: 70953
 2009-05-05 00:46:16 +00:00
Evan Cheng
95ce4ffb36 Move getInstrOperandRegClass from the scheduler to TargetInstrInfo. 
llvm-svn: 70950
 2009-05-05 00:30:09 +00:00
Evan Cheng
ecfc8e8464 Do forward and backward substitution to eliminate loads and stores when possible. 
llvm-svn: 70937
 2009-05-04 23:13:13 +00:00
Chris Lattner
7e3c94b55e Make DBG_STOPPOINT nodes, and therefore DBG_LABEL labels, get a DebugLoc, so that it 
shows up in -print-machineinstrs.  This doesn't appear to affect anything, but it was
weird for some DBG_LABELs to have DebugLocs but not all of them.

llvm-svn: 70921
 2009-05-04 22:10:05 +00:00
Argyrios Kyrtzidis
f82d02a6ca Restore a comment. 
llvm-svn: 70900
 2009-05-04 19:23:45 +00:00
Argyrios Kyrtzidis
fb958c2b09 -Remove the DwarfWriter::RecordSourceLine calls from the instruction selectors. 
-Depend on DebugLocs for source line info.

(Comes with Regression-Be-Gone(tm))

llvm-svn: 70871
 2009-05-04 16:23:49 +00:00
Evan Cheng
9df9768ee5 Make sure to color with only allocatable registers for the specific register class. 
llvm-svn: 70821
 2009-05-04 03:30:11 +00:00
Evan Cheng
bb12bac53b The stack slots which share the same stack slot after coloring can, but do not have to, use the same register. In fact, they each may have different register class requirements. 
llvm-svn: 70815
 2009-05-04 00:24:50 +00:00
Argyrios Kyrtzidis
e68261749e Revert r70803 for now, it causes a regression. 
llvm-svn: 70811
 2009-05-03 23:27:19 +00:00
Argyrios Kyrtzidis
bb6e4d027c -Remove the DwarfWriter::RecordSourceLine calls from the instruction selectors. 
-Depend on DebugLocs for source line info.

llvm-svn: 70803
 2009-05-03 22:03:35 +00:00
Evan Cheng
a64d6b8822 Typo. 
llvm-svn: 70792
 2009-05-03 19:10:11 +00:00
Evan Cheng
28aa6c41d1 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. 
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.

Not yet enabled. This is part 1. More coming.

llvm-svn: 70787
 2009-05-03 18:32:42 +00:00
Anton Korobeynikov
15587901c3 Fix typo 
llvm-svn: 70770
 2009-05-03 13:19:57 +00:00
Anton Korobeynikov
34d22f34a8 Properly handle sdiv / udiv / srem / urem libcalls 
llvm-svn: 70764
 2009-05-03 13:18:16 +00:00
Anton Korobeynikov
7f560f113d Proper name 16 bit libcalls 
llvm-svn: 70750
 2009-05-03 13:14:08 +00:00
Anton Korobeynikov
b4da45ecd8 Add libcall expansion for 16 and 128 bit muls 
llvm-svn: 70749
 2009-05-03 13:13:51 +00:00
Argyrios Kyrtzidis
a034549d67 -Move the DwarfWriter::ValidDebugInfo check to a static DIDescriptor::ValidDebugInfo 
-Create DebugLocs without the need to have a DwarfWriter around

llvm-svn: 70682
 2009-05-03 08:50:41 +00:00
Bob Wilson
da90bf9e40 Allow CONCAT_VECTORS nodes to be legal or have custom lowering for some targets. 
Changes to take advantage of this will come later.

llvm-svn: 70560
 2009-05-01 17:55:32 +00:00
Bill Wendling
2da6a65b62 Simplify more code and add timer stuff. 
llvm-svn: 70539
 2009-05-01 08:40:06 +00:00
Bill Wendling
0bab670012 Simplify more code. 
llvm-svn: 70537
 2009-05-01 08:35:12 +00:00
Bill Wendling
662dfea32e Simplify some code. 
llvm-svn: 70534
 2009-05-01 08:32:14 +00:00
Bill Wendling
2f01fd9bf1 Fix whitespace. It was confusing me. 
llvm-svn: 70533
 2009-05-01 08:25:13 +00:00
Evan Cheng
d6a780a181 Code clean up. Bye bye PhysRegTracker. 
llvm-svn: 70524
 2009-05-01 01:03:49 +00:00
Argyrios Kyrtzidis
9956976b76 Make DebugLoc independent of DwarfWriter. 
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)

llvm-svn: 70520
 2009-04-30 23:22:31 +00:00
Jakob Stoklund Olesen
17d292db73 Join cross class copies using getCommonSubClass() 
llvm-svn: 70513
 2009-04-30 21:24:03 +00:00
Evan Cheng
a4c868f1d4 Add a smarter heuristic to determine when to coalesce a virtual register with a physical one. More specifically, it avoid tying a virtual register in the loop with a physical register defined / used outside the loop. When it determines it's not profitable, it will use the physical register as the allocation preference instead. 
This is *not* turned on by default. Testing indicates this is just as likely to pessimize code. The main issue seems to be allocation preference doesn't work effectively. That will change once I've taught register allocator "swapping".

llvm-svn: 70503
 2009-04-30 18:39:57 +00:00
Jay Foad
9768cabf4a Move helper functions for optimizing division by constant into the APInt 
class.

llvm-svn: 70488
 2009-04-30 10:15:35 +00:00
Chris Lattner
794fb5b4b3 fix a regression handling indirect results: these need to be considered 
memory operands otherwise the writebacks get lost when the inline asm 
doesn't otherwise have side effects.  This fixes rdar://6839427, though
clang really shouldn't generate these anymore.

llvm-svn: 70455
 2009-04-30 00:48:50 +00:00
Bill Wendling
40a162f75f Instead of passing in an unsigned value for the optimization level, use an enum, 
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
 2009-04-29 23:29:43 +00:00
Nate Begeman
b407809122 Fix infinite recursion in the C++ code which handles movddup by making it unnecessary. 
llvm-svn: 70425
 2009-04-29 22:47:44 +00:00
Jakob Stoklund Olesen
0bfaaea2a4 MachineInstr::isRegTiedTo{Use,Def}Operand can safely be made const. 
llvm-svn: 70408
 2009-04-29 20:57:16 +00:00
Nate Begeman
e4dd5a96ba Update comment, replace theoretically impossible check with an assert. 
llvm-svn: 70391
 2009-04-29 18:13:31 +00:00
Evan Cheng
62fdc300dd spillPhysRegAroundRegDefsUses() may have invalidated iterators stored in fixed_ IntervalPtrs. Reset them. 
llvm-svn: 70378
 2009-04-29 07:16:34 +00:00
Nate Begeman
414534b3eb Implement review feedback for vector shuffle work. 
llvm-svn: 70372
 2009-04-29 05:20:52 +00:00
Sanjiv Gupta
b1c777e865 Add a public method called getAddressSpace() to the GlobalAddressSDNode. 
llvm-svn: 70366
 2009-04-29 04:43:24 +00:00
Chris Lattner
e1eefefdc3 Disable the load-shrinking optimization from looking at 
anything larger than 64-bits, avoiding a crash.  This should
really be fixed to use APInts, though type legalization happens
to help us out and we get good code on the attached testcase at
least.

This fixes rdar://6836460

llvm-svn: 70360
 2009-04-29 03:45:07 +00:00
Evan Cheng
51727d25b2 Determine allocation 'preference' with right register class. I haven't seen this changing codegen so no test case. 
llvm-svn: 70351
 2009-04-29 00:42:27 +00:00
Bill Wendling
7546bed590 Second attempt: 
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
 2009-04-29 00:15:41 +00:00
Evan Cheng
46e0ff09e5 Move getMatchingSuperReg() out of coalescer and into TargetRegisterInfo. 
llvm-svn: 70309
 2009-04-28 18:29:27 +00:00
Jakob Stoklund Olesen
6a489c6d7e Don't coalesce a physical register with an incompatible virtual register. 
If the physical register does not belong to the virtual register's regclass,
don't coalesce. The physical register could be an invalid operand for an
instruction using the vreg.

The regclass matching is done after determining the actual subregisters being copied.

llvm-svn: 70298
 2009-04-28 16:34:35 +00:00