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46014 Commits

Author SHA1 Message Date
Che-Liang Chiou
7c5fc3a68f ptx: add analyze/insert/remove branch 
llvm-svn: 128084
 2011-03-22 14:12:00 +00:00
Eric Christopher
7497603688 Fix comment in header. 
llvm-svn: 128077
 2011-03-22 08:49:56 +00:00
Ted Kremenek
d582517a58 Properly initialize all fields in CrashReporterCleanupContext. This caused the buildbot failure earlier. 
llvm-svn: 128071
 2011-03-22 04:33:13 +00:00
Anders Carlsson
8f934f6652 Handle another case that Frits suggested. 
llvm-svn: 128068
 2011-03-22 03:21:01 +00:00
Ted Kremenek
33f7ecabd4 Temporarily stop recovering resources in CrashRecoveryContext while I investigate further why this works on my machine and not on others. 
llvm-svn: 128065
 2011-03-22 02:06:32 +00:00
Jim Grosbach
e19f7261d5 Hook up the MCJIT to the RuntimeDyld library. 
Lots of cleanup to make the interfaces prettier, use the JITMemoryManager,
handle multiple functions and modules, etc.. This gets far enough that
the MCJIT compiles and runs code, though.

llvm-svn: 128052
 2011-03-22 01:06:42 +00:00
Jakob Stoklund Olesen
ac3cdb2811 Clear map after use. 
This is likely to fix the segfault in llvm-gcc-x86_64-darwin10-cross-mingw32.

llvm-svn: 128051
 2011-03-22 01:03:24 +00:00
Jim Grosbach
454b60d042 Initialize HasError. 
llvm-svn: 128049
 2011-03-22 00:42:19 +00:00
Matt Beaumont-Gay
7aa8a7d216 Avoid -Wunused-variable in -asserts builds 
llvm-svn: 128048
 2011-03-22 00:37:28 +00:00
Jakob Stoklund Olesen
fc9e8a04c3 Dont emit 'DBG_VALUE %noreg, ...' to terminate user variable ranges. 
These ranges get completely jumbled by the post-ra scheduler, and it is not
really reasonable to expect it to make sense of them.

Instead, teach DwarfDebug to notice when user variables in registers are
clobbered, and terminate the ranges there.

llvm-svn: 128045
 2011-03-22 00:21:41 +00:00
Dan Gohman
a83323bca5 Fix fast-isel address mode folding to avoid folding instructions 
outside of the current basic block. This fixes PR9500, rdar://9156159.

llvm-svn: 128041
 2011-03-22 00:04:35 +00:00
Owen Anderson
1264624890 Add support for Thumb interworking addresses for symbol offsets that get constant folded very early. 
This fixes SPASS with -integrated-as.  <rdar://problem/9165399>

llvm-svn: 128037
 2011-03-21 23:13:43 +00:00
Oscar Fuentes
a2dca8505f Build the new RuntimeDyld library. 
llvm-svn: 128035
 2011-03-21 23:07:53 +00:00
Jim Grosbach
9ad8d572e9 Library-ize the dyld components of llvm-rtdyld. 
Move the dynamic linking functionality of the llvm-rtdyld program into an
ExecutionEngine support library. Update llvm-rtdyld to just load an object
file into memory, use the library to process it, then run the _main()
function, if one is found.

llvm-svn: 128031
 2011-03-21 22:15:52 +00:00
Devang Patel
05641a9b85 Simplify. 
llvm-svn: 128030
 2011-03-21 22:04:45 +00:00
Nick Lewycky
e8f6eb49ee Fix INT_MIN gotcha pointed out by Eli Friedman. 
llvm-svn: 128028
 2011-03-21 21:40:32 +00:00
Ted Kremenek
a462a53e0b Provide a means for CrashRecovery clients to determine if code is currently running while crash recovery cleanups are being processed. 
llvm-svn: 128008
 2011-03-21 18:38:03 +00:00
Eric Christopher
44e3d3c26e Grammar-o. 
llvm-svn: 128004
 2011-03-21 18:06:21 +00:00
Anders Carlsson
41cc428751 More cleanups to the OptimizeEmptyGlobalCXXDtors GlobalOpt function. 
llvm-svn: 127997
 2011-03-21 14:54:40 +00:00
Bill Wendling
a2eec46242 We need to pass the TargetMachine object to the InstPrinter if we are printing 
the alias of an InstAlias instead of the thing being aliased. Because we need to
know the features that are valid for an InstAlias.

This is part of a work-in-progress.

llvm-svn: 127986
 2011-03-21 04:13:46 +00:00
Anders Carlsson
59d24b6777 As suggested by Nick Lewycky, ignore debugging intrinsics when trying to decide whether a destructor is empty or not. 
llvm-svn: 127985
 2011-03-21 02:42:27 +00:00
Nick Lewycky
2f6da949e9 Fix comments 
llvm-svn: 127984
 2011-03-21 02:26:01 +00:00
Eli Friedman
0da0b4aed0 This README entry was fixed recently. 
llvm-svn: 127982
 2011-03-21 01:33:03 +00:00
Evan Cheng
dd99a0a548 Re-apply r127953 with fixes: eliminate empty return block if it has no predecessors; update dominator tree if cfg is modified. 
llvm-svn: 127981
 2011-03-21 01:19:09 +00:00
Anders Carlsson
097f3f44a8 Don't try to eliminate invokes to __cxa_atexit. 
llvm-svn: 127976
 2011-03-20 20:21:33 +00:00
Anders Carlsson
07922b7344 Don't segfault on mutual recursion, as pointed out by Frits. 
llvm-svn: 127975
 2011-03-20 20:16:43 +00:00
Anders Carlsson
1b29d560bf Address comments from Frits van Bommel. 
llvm-svn: 127974
 2011-03-20 19:51:13 +00:00
Jakob Stoklund Olesen
7f9de06cc4 Process all dead defs after rematerializing during splitting. 
llvm-svn: 127973
 2011-03-20 19:46:23 +00:00
Rafael Espindola
b5c6ae67ac Write the section table and the section data in the same order that 
gun as does. This makes it a lot easier to compare the output of both
as the addresses are now a lot closer.

llvm-svn: 127972
 2011-03-20 18:44:20 +00:00
Anders Carlsson
afcc55f09c Add an optimization to GlobalOpt that eliminates calls to __cxa_atexit, if the function passed is empty. 
llvm-svn: 127970
 2011-03-20 17:59:11 +00:00
Benjamin Kramer
dd8cb156c1 Avoid initializing posix_spawn_file_actions_t if not used. 
- glibc falls back to fork+exec if a file actions object is present.
- On BSDs this saves a malloc.

llvm-svn: 127969
 2011-03-20 15:52:24 +00:00
Jakob Stoklund Olesen
6bc47435a9 Also eliminate redundant spills downstream of inserted reloads. 
This can happen when multiple sibling registers are spilled after live range
splitting.

llvm-svn: 127965
 2011-03-20 05:44:58 +00:00
Jakob Stoklund Olesen
911619d9e2 Change an argument to a LiveInterval instead of a register number to save some redundant lookups. 
llvm-svn: 127964
 2011-03-20 05:44:55 +00:00
Jakob Stoklund Olesen
916b11e88b Replace a broken LiveInterval::MergeValueInAsValue() with something simpler. 
llvm-svn: 127960
 2011-03-19 23:02:49 +00:00
Jakob Stoklund Olesen
bf1a7cb32d Add debug output. 
llvm-svn: 127959
 2011-03-19 23:02:47 +00:00
Daniel Dunbar
34c65737c3 Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessors 
to canonicalize IR", it broke a lot of things.

llvm-svn: 127954
 2011-03-19 21:47:14 +00:00
Evan Cheng
c5f50f7322 SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IR 
to have single return block (at least getting there) for optimizations. This
is general goodness but it would prevent some tailcall optimizations.
One specific case is code like this:
int f1(void);
int f2(void);
int f3(void);
int f4(void);
int f5(void);
int f6(void);
int foo(int x) {
  switch(x) {
  case 1: return f1();
  case 2: return f2();
  case 3: return f3();
  case 4: return f4();
  case 5: return f5();
  case 6: return f6();
  }
}

=>
LBB0_2:                                 ## %sw.bb
  callq   _f1
  popq    %rbp
  ret
LBB0_3:                                 ## %sw.bb1
  callq   _f2
  popq    %rbp
  ret
LBB0_4:                                 ## %sw.bb3
  callq   _f3
  popq    %rbp
  ret

This patch teaches codegenprep to duplicate returns when the return value
is a phi and where the phi operands are produced by tail calls followed by
an unconditional branch:

sw.bb7:                                           ; preds = %entry
  %call8 = tail call i32 @f5() nounwind
  br label %return
sw.bb9:                                           ; preds = %entry
  %call10 = tail call i32 @f6() nounwind
  br label %return
return:
  %retval.0 = phi i32 [ %call10, %sw.bb9 ], [ %call8, %sw.bb7 ], ... [ 0, %entry ]
  ret i32 %retval.0

This allows codegen to generate better code like this:

LBB0_2:                                 ## %sw.bb
        jmp     _f1                     ## TAILCALL
LBB0_3:                                 ## %sw.bb1
        jmp     _f2                     ## TAILCALL
LBB0_4:                                 ## %sw.bb3
        jmp     _f3                     ## TAILCALL

rdar://9147433

llvm-svn: 127953
 2011-03-19 17:17:39 +00:00
Evan Cheng
adde7c1aae Minor code re-structuring. 
llvm-svn: 127952
 2011-03-19 17:03:16 +00:00
Nadav Rotem
92561196b7 Add support for legalizing UINT_TO_FP of vectors on platforms which do 
not have native support for this operation (such as X86).
The legalized code uses two vector INT_TO_FP operations and is faster
than scalarizing.

llvm-svn: 127951
 2011-03-19 13:09:10 +00:00
Stuart Hastings
0c1298989f Reapply 127939 since Daniel fixed the breakage. <rdar://problem/9012638> 
llvm-svn: 127944
 2011-03-19 02:42:31 +00:00
Stuart Hastings
0b337d0fe8 Revert 127939. <rdar://problem/9012638> 
llvm-svn: 127943
 2011-03-19 02:33:56 +00:00
Stuart Hastings
4a2b1ca9c1 Revise r126127 to address Daniel's comments. <rdar://problem/9012638> 
llvm-svn: 127939
 2011-03-19 01:32:01 +00:00
Johnny Chen
3520263009 Fixed an assert by the ARM disassembler for LDRD_PRE/POST. 
The relevant instruction table entries were changed sometime ago to no longer take
<Rt2> as an operand.  Modify ARMDisassemblerCore.cpp to accomodate the change and
add a test case.

llvm-svn: 127935
 2011-03-19 01:16:20 +00:00
Ted Kremenek
c4fa37479a Tweak CrashRecoveryContextCleanup to provide an easy method for clients to select between 'delete' and 'destructor' cleanups, and allow the destructor of CrashRecoveryContextCleanupRegister to be pseudo re-entrant. 
llvm-svn: 127929
 2011-03-19 00:59:37 +00:00
Ted Kremenek
be390d8777 Tweak CrashRecoveryContext::GetCurrent() to return quickly if 'gCrsahRecoveryEnabled' is false. This avoids us needing to go to thread local storage for 
the performance sensitive case where we are compiling code.

llvm-svn: 127928
 2011-03-19 00:59:33 +00:00
Devang Patel
c8b77563dc If an AllocaInst referred by DbgDeclareInst is used by a LoadInst then the LoadInst should also get a corresponding llvm.dbg.value intrinsic. 
llvm-svn: 127924
 2011-03-18 23:45:43 +00:00
Devang Patel
a5de669faa Remove dead code. 
llvm-svn: 127923
 2011-03-18 23:33:58 +00:00
Devang Patel
bafc4fec54 Consider debug info intrinsics pointing to null value as dead instructions. 
llvm-svn: 127922
 2011-03-18 23:28:02 +00:00
Jim Grosbach
89580295e7 Silence a warning. 
llvm-svn: 127918
 2011-03-18 22:50:49 +00:00
Owen Anderson
16fce7d4af Add support to the ARM asm parser for the register-shifted-register forms of basic instructions like ADD. More work left to be done to support other instances of shifter ops in the ISA. 
llvm-svn: 127917
 2011-03-18 22:50:18 +00:00