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Commit Graph

195389 Commits

Author SHA1 Message Date
Christopher Tetreault
7e1e427f28 [SVE] Remove calls to getBitWidth from PowerPC
Reviewers: efriedma, sdesmalen, hfinkel, david-arm, fpetrogalli

Reviewed By: efriedma, fpetrogalli

Subscribers: wuzish, nemanjai, tschuett, hiraditya, kbarton, rkruppe, psnobl, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77900
2020-04-20 14:18:37 -07:00
Christopher Tetreault
2d6f359282 [SVE] Remove calls to getBitWidth from mips
Reviewers: efriedma, ahatanak, sdesmalen, c-rhodes, david-arm

Reviewed By: efriedma

Subscribers: dexonsmith, sdardis, arichardson, tschuett, hiraditya, jrtc27, atanasyan, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77906
2020-04-20 14:09:06 -07:00
David Green
54b3bad454 [ARM] MVE and scalar postinc mir tests. NFC 2020-04-20 22:00:07 +01:00
Piotr Sobczak
ca88e6d173 Revert "[AMDGPU] Set the CostPerUse value for vgpr registers."
This reverts commit 728b878de689e4921ca7f864ed3036f9b2c53853.

D76417 has caused vgpr count to go up significantly in real-world
graphics content.
2020-04-20 22:47:31 +02:00
Christopher Tetreault
b5b32e90f2 [SVE] Remove calls to getBitWidth from Analysis
Reviewers: efriedma, sdesmalen, jnspaulsson, jonpa

Reviewed By: efriedma

Subscribers: tschuett, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77898
2020-04-20 13:39:45 -07:00
Andrew Litteken
ac798ed144 [MachineOutliner] Annotation for outlined functions in AArch64
- Adding changes to support comments on outlined functions with outlining for the conditions through which it was outlined (e.g. Thunks, Tail calls)
- Adapts the emitFunctionHeader to print out a comment next to the header if the target specifies it based on information in MachineFunctionInfo
- Adds mir test for function annotiation

Differential Revision: https://reviews.llvm.org/D78062
2020-04-20 13:33:31 -07:00
Craig Topper
d3c8547d05 Revert "[Local] Update getOrEnforceKnownAlignment/getKnownAlignment to use Align/MaybeAlign."
This is breaking the clang build.

This reverts commit 897409fb56f4525639b0e47e88960f24cd91c924.
2020-04-20 13:25:06 -07:00
Craig Topper
065c040876 [Local] Update getOrEnforceKnownAlignment/getKnownAlignment to use Align/MaybeAlign.
Differential Revision: https://reviews.llvm.org/D78443
2020-04-20 13:08:05 -07:00
Mircea Trofin
be64b760d9 [llvm][NFC][CallSite] Remove CallSite from Lint.cpp
Summary: The CallSite arg iterator is really User::op_iterator.

Reviewers: dblaikie, craig.topper

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78507
2020-04-20 12:29:11 -07:00
Chris Bowler
062f8cacd4 [NFC] [AIX] [PowerPC] Add missing instruction to AIX byval test 2020-04-20 15:00:59 -04:00
Eli Friedman
bdd64d49f8 Require "target datalayout" to be at the beginning of an IR file.
This will allow us to use the datalayout to disambiguate other
constructs in IR, like load alignment. Split off from D78403.

Differential Revision: https://reviews.llvm.org/D78413
2020-04-20 11:55:49 -07:00
David Tenty
df6dde265f [AIX] Return the correct set of callee saved regs
Summary:
r13 isn't reserved on 32-bit AIX, which is reflected in our calling
convention but not callee saved regs.

Reviewers: sfertile, ZarkoCA, cebowleratibm, jasonliu

Reviewed By: sfertile

Subscribers: thakis, lei, wuzish, nemanjai, hiraditya, kbarton, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77101
2020-04-20 14:31:08 -04:00
Nemanja Ivanovic
ed866fddf7 [PowerPC] Do not attempt to reuse load for 64-bit FP_TO_UINT without FPCVT
We call the function that attempts to reuse the conversion without checking
whether the target matches the constraints that the callee expects. This patch
adds the check prior to the call.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=43976

Differential revision: https://reviews.llvm.org/D77564
2020-04-20 13:00:06 -05:00
David Green
157dfafe06 [ARM] Add an low overhead sibling loop test. NFC 2020-04-20 18:46:38 +01:00
Craig Topper
a51a057b22 [CallSite removal][ExecutionEngine] Use CallBase in the Interpreter. NFC
Differential Revision: https://reviews.llvm.org/D78475
2020-04-20 10:37:03 -07:00
Zola Bridges
0bc062586e [dfsan] Add "DataFlow" option to LLVM_USE_SANITIZER
Summary:
This patch add the dataflow option to LLVM_USE_SANITIZER and documents
it.

Tested via check-cxx (wip to fix the errors).

Reviewers: morehouse, #libc!

Subscribers: mgorny, cfe-commits, libcxx-commits

Tags: #clang, #libc

Differential Revision: https://reviews.llvm.org/D78390
2020-04-20 10:30:52 -07:00
Sean Fertile
0eeae87b18 [PowerPC][AIX] Use a file check variable for register used in addressing. 2020-04-20 13:08:09 -04:00
David Tenty
aad00876ba Revert "[AIX] Return the correct set of callee saved regs"
This reverts commit 6c881bf1fec2288907cd87a7895c863243bba7c5.
2020-04-20 13:06:37 -04:00
Nikita Popov
bcce10ae54 [ValueLattice] Add move constructor (NFC)
Following the rule of five, declare move constructor and move
assignment operator for ValueLatticeElement. This allows moving
the ConstantRange rather than copying it.

This does not matter in most cases, where we're dealing with
APInts <= 64 bits. It does avoid unnecessary copies of allocations
for larger APInts.

Additionally we change the implementation approach to make the
copy/move assignment operators make use of the copy/move constructors,
rather than the other way around. The constructors are the more
primitive operations.

Differential Revision: https://reviews.llvm.org/D78425
2020-04-20 18:32:38 +02:00
Nikita Popov
4f91b71a8c [IPT] Don't use OrderedInstructions (NFC)
Use Instruction::comesBefore() instead of OrderedInstructions
inside InstructionPrecedenceTracking. This also removes the
dominator tree dependency.

Differential Revision: https://reviews.llvm.org/D78461
2020-04-20 18:25:31 +02:00
Sean Fertile
f1caded05f [PowerPC][AIX] ByVal formal argument support: passing on the stack.
Adds support for passing a ByVal formal argument completely on the stack
(ie after all argument registers are exhausted).

Differential Revision: https://reviews.llvm.org/D78263
2020-04-20 12:04:59 -04:00
Florian Hahn
9bfcd35921 [VectorUtils] Use early_inc_range instead of DelSet (NFC).
DelSet was used to avoid invalidating the current iterator while
modifying the map we are iterating over.

By using an early_inc_range, (which increments to iterator 'early',
allowing us to remove the current element), we can get rid of DelSet.

Reviewers: gilr, rengolin, Ayal, hsaito

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D78420
2020-04-20 16:36:26 +01:00
David Tenty
186e585045 [AIX] Return the correct set of callee saved regs
Summary:
r13 isn't reserved on 32-bit AIX, which is reflected in our calling
convention but not callee saved regs.

Reviewers: sfertile, ZarkoCA, cebowleratibm, jasonliu

Reviewed By: sfertile

Subscribers: lei, wuzish, nemanjai, hiraditya, kbarton, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77101
2020-04-20 11:22:17 -04:00
Petre-Ionut Tudor
d7f4de138b Revert "[ARM] Fix conditions for lowering to S[LR]I"
This reverts commit cabfcf840a9d15d92466c6774953d3aa399cde92.
The patch introduced another bug in the optimization.
2020-04-20 16:11:04 +01:00
Simon Pilgrim
873e52be04 BranchFolding.h - cleanup includes and forward declarations. NFC.
Push MBFIWrapper.h include down to BranchFolding.cpp/IfConversion.cpp
2020-04-20 15:59:39 +01:00
Simon Pilgrim
1a52e13cf6 MIRVRegNamerUtils.h - remove unnecessary includes. NFC.
Replace with forward declarations or push down to MIRVRegNamerUtils.cpp where necessary.
2020-04-20 15:59:39 +01:00
Bjorn Pettersson
651fd597ec [Scalarizer] Fix a non-deterministic scatter order problem
Summary:
The indexing operator in Scatterer may result in building new
instructions. When using multiple such operators in a function
argument list the order in which we build instructions depend on
argument evaluation order (which is undefined in C++).
This patch avoid such problems by expanding the components using
the [] operator prior to the function call.

Problem was seen when comparing output, while builing LLVM with
different compilers (clang vs gcc).

Reviewers: foad, cameron.mcinally, uabelho

Reviewed By: foad

Subscribers: hiraditya, mgrang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78455
2020-04-20 16:05:33 +02:00
Simon Pilgrim
7cc1fa02ff X86MacroFusion.cpp - ensure X86MacroFusion.h module header is included first. NFC. 2020-04-20 14:25:15 +01:00
LLVM GN Syncbot
c35192c3a0 [gn build] Port 12030494fce 2020-04-20 13:10:45 +00:00
Konstantin Schwarz
f8b561b2e4 [GlobalISel] Introduce InlineAsmLowering class
Summary:
Similar to the CallLowering class used for lowering LLVM IR calls to MIR calls,
we introduce a separate class for lowering LLVM IR inline asm to MIR INLINEASM.

There is no functional change yet, all existing tests should pass.

Reviewers: arsenm, dsanders, aemerson, volkan, t.p.northover, paquette

Reviewed By: aemerson

Subscribers: gargaroff, wdng, mgorny, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78316
2020-04-20 15:10:18 +02:00
serge-sans-paille
401ae49b1e [nfc] Cleanup extension header generation 2020-04-20 14:44:34 +02:00
Mark Murray
47a69dd1a9 Revert 3ce0ad1b336e67a76d78ae7ff7d66fe127586620 Die to breakage in check-lld.
Requested-by: Nico Weber
2020-04-20 13:01:36 +01:00
Ayke van Laethem
acec601432 [AVR] Do not place functions in .progmem.data
Previously, the AVR backend would put functions in .progmem.data. This
is probably a regression from when functions still lived in address
space 0. With this change, only global constants are placed in
.progmem.data.

This is not complete: avr-gcc additionally respects -fdata-sections for
progmem global constants, which LLVM doesn't yet do. But fixing that is
a bit more complicated (and I believe other backends such as RISC-V
might also have similar issues).

Differential Revision: https://reviews.llvm.org/D78212
2020-04-20 13:56:38 +02:00
Ayke van Laethem
3020b94359 [AVR] Do not use divmod calls for bigger integers
The avr-libc provides *divmodqi4, *divmodhi4, and *divmodsi4 functions,
but does not provide a *divmoddi4. Instead it provides regular *divdi3
and *moddi3 functions.

Note that avr-libc doesn't support *divti3 or *modti3 for 128-bit
integer manipulation.

Source:
https://github.com/gcc-mirror/gcc/blob/releases/gcc-5.4.0/libgcc/config/avr/lib1funcs.S

Differential Revision: https://reviews.llvm.org/D78437
2020-04-20 13:56:38 +02:00
Georgii Rymar
f2e06d7e57 [FileCheck] - Refactor the code related to string arrays. NFCI.
There are few `std::vector<std::string>` members in
`FileCheckRequest`. This patch changes these arrays to `std::vector<StringRef>`
and refactors the code related to cleanup/improve/simplify it.

Differential revision: https://reviews.llvm.org/D78202
2020-04-20 14:54:49 +03:00
Georgii Rymar
d3ebe0593f [obj2yaml] - Teach obj2yaml to dump SHT_NOBITS sections when dumping program headers.
SHT_NOBITS are a bit special because occupy no physical space.
This patch adds support for them.

Differential revision: https://reviews.llvm.org/D77805
2020-04-20 14:35:28 +03:00
Georgii Rymar
f462f0718a [llvm-readobj] - Fix crashes and misbehaviors when reading strings from broken string tables.
There are cases when we either might print garbage or crash when
reading strings for dumping dynamic tags.

For example when a string table is not null-terminated or goes past the EOF.
This patch fixes issues mentioned.

Differential revision: https://reviews.llvm.org/D77216
2020-04-20 14:14:17 +03:00
Simon Pilgrim
0a20e5334a X86Subtarget.h - remove unused includes. NFC.
Replace with forward declarations.
2020-04-20 12:10:45 +01:00
Dmitry Preobrazhensky
abab96c577 [MC][DWARF] Corrected handling of is_stmt flag in .loc directives
According to DWARF standard, is_stmt is a global flag; when set or cleared it should affect subsequent .loc directives.

However llvm assembler handled is_stmt differently: it forced all locations to have is_stmt=1 unless is_stmt was specified explicitly as 0.

The fix utilizes current DWARF state flags to compute correct is_stmt values.

See https://bugs.llvm.org/show_bug.cgi?id=45529 for a detailed issue description.

Reviewers: arsenm, probinson, enderby

Differential Revision: https://reviews.llvm.org/D78102
2020-04-20 13:57:49 +03:00
Simon Pilgrim
4cbc237942 X86Subtarget.cpp - sort includes. NFC
Ensure X86Subtarget.h module header is at the top, and sort the remaining includes.
2020-04-20 11:54:04 +01:00
Simon Pilgrim
8bcf7dde2c X86MCTargetDesc.h - remove unnecessary MCStreamer.h include. NFC.
We don't need all of MCStreamer.h, just FormattedStream.h. The rest can be replaced with forward declarations.
X86WinAllocaExpander.cpp had an implicit dependency on MapVector.h which I've added locally.
2020-04-20 11:39:38 +01:00
Simon Pilgrim
abe3843a10 X86MCAsmInfo.h - remove unnecessary MCAsmInfo.h include. NFC.
We only use the COFF/Darwin/ELF classes directly.
2020-04-20 11:39:38 +01:00
Simon Pilgrim
536d7facd0 X86InstrFoldTables.h - remove unnecessary include. NFC.
We don't need the limits defines, just the sized integer types so use cstdint system header directly.
2020-04-20 11:39:38 +01:00
Kerry McLaughlin
44b117aaea [AArch64][SVE] Remove LD1/ST1 dependency on llvm.masked.load/store
Summary:
The SVE masked load and store intrinsics introduced in D76688 rely on
common llvm.masked.load/store nodes. This patch creates new ISD nodes
for LD1(S) & ST1 to remove this dependency.

Additionally, this adds support for sign & zero extending
loads and truncating stores.

Reviewers: sdesmalen, efriedma, cameron.mcinally, c-rhodes, rengolin

Reviewed By: efriedma

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, andwar, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78204
2020-04-20 11:08:11 +01:00
Florian Hahn
83ed442196 [VPlan] Clean up tryToCreate(Widen)Recipe. (NFC)
This patch includes some clean-ups to tryToCreateRecipe, suggested in
D77973.

It includes:
  * Renaming tryToCreateRecipe to tryToCreateWidenRecipe.
  * Move VPBB insertion logic to caller of tryToCreateWidenRecipe.
  * Hoists instruction checks to tryToCreateWidenRecipe, making it
    clearer which instructions are handled by which recipe, simplifying
    the checks by using early exits.
  * Split up handling of induction PHIs and truncates using inductions.

Reviewers: gilr, rengolin, Ayal, hsaito

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D78287
2020-04-20 10:06:35 +01:00
Sam Parker
e91e7bcdb8 [ARM][MVE] Add patterns for VRHADD
Add patterns which use standard add nodes along with arm vshr imm
nodes.

Differential Revision: https://reviews.llvm.org/D77069
2020-04-20 10:05:21 +01:00
Mark Murray
62c13530fd [ARM][MC][Thumb] Revert relocation for some pc-relative fixups.
Summary:
This commit reverts https://reviews.llvm.org/D75039. Concensus appears to
be in favour of assembly-time resolution of these ADR and LDR relocations,
in line with GNU.

Reviewers: psmith

Subscribers: kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78301
2020-04-20 09:38:12 +01:00
Florian Hahn
ab0e920a95 [PredicateInfo] Use new Instruction::comesBefore instead of OI (NFC).
The recently added Instruction::comesBefore can be used instead of
OrderedInstructions.

Reviewers: rnk, nikic, efriedma

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D78452
2020-04-20 09:22:21 +01:00
Sam Parker
55f623649f [NFC][TTI] Explicit use of VectorType
The API for shuffles and reductions uses generic Type parameters,
instead of VectorType, and so assertions and casts are used a lot.
This patch makes those types explicit, which means that the clients
can't be lazy, but results in less ambiguity, and that can only be a
good thing.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=45562

Differential Revision: https://reviews.llvm.org/D78357
2020-04-20 09:16:52 +01:00
Kang Zhang
3488ec9fbf [CodeGen] Support freeze expand for ppc_fp128
Summary:
The patch D29014 has added the new ISD::FREEZE and can deal with the
integer.
The patch D76980 has added SoftenFloatRes_FREEZE for float point.
But we still lack of expand for ppc_fp128, this will cause assertion for
some cases.
This patch is to support freeze expand for ppc_fp128.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D78278
2020-04-20 07:27:41 +00:00