1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
Commit Graph

15 Commits

Author SHA1 Message Date
Michael Gottesman
7ebc3e8637 Use llvm::next() instead of incrementing begin iterators of std::vector.
Iterator of std::vector may be implemented as a raw pointer. In
this case begin iterators are rvalues and cannot be incremented.
For example, this is the case with STDCXX implementation of vector.

Patch by Konstantin Tokarev <annulen@yandex.ru>.

llvm-svn: 189911
2013-09-04 04:19:01 +00:00
Vincent Lejeune
14935c8687 R600: Remove predicated_break inst
We were using two instructions for similar purpose : break and
predicated break. Only predicated_break was emitted and it was
lowered at R600ControlFlowFinalizer to JUMP;CF_BREAK;POP.
This commit simplify the situation by making AMDILCFGStructurizer
emit IF_PREDICATE;BREAK;ENDIF; instead of predicated_break (which
is now removed).

There is no functionality change.

llvm-svn: 187510
2013-07-31 19:31:14 +00:00
Vincent Lejeune
946e631d0f R600: Don't emit empty then clause and use alu_pop_after
llvm-svn: 186725
2013-07-19 21:45:15 +00:00
Vincent Lejeune
0872500c7d R600: Simplify AMDILCFGStructurize by removing templates and assuming single exit
llvm-svn: 186724
2013-07-19 21:45:06 +00:00
Vincent Lejeune
2bcf101e52 R600: Replace legacy debug code in AMDILCFGStructurizer.cpp
llvm-svn: 186723
2013-07-19 21:44:56 +00:00
Craig Topper
58fa7a9b4a Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
llvm-svn: 186274
2013-07-14 04:42:23 +00:00
Craig Topper
9729e843cb Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.
llvm-svn: 185540
2013-07-03 15:07:05 +00:00
Tom Stellard
0ffa8d28b1 R600: Rework subtarget info and remove AMDILDevice classes
This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
llvm-svn: 183566
2013-06-07 20:37:48 +00:00
Bill Wendling
aa15a56463 Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.

llvm-svn: 183561
2013-06-07 20:28:55 +00:00
Benjamin Kramer
0d26c557b0 R600: Hide symbols of implementation details.
Also removes an unused function.

llvm-svn: 182587
2013-05-23 15:43:05 +00:00
Vincent Lejeune
712c6f4f44 R600: Fix JUMP handling so that MachineInstr verification can occur
This allows R600 Target to use the newly created -verify-misched llc flag

llvm-svn: 176819
2013-03-11 18:15:06 +00:00
Chandler Carruth
5f5c383ef1 Resort the #include lines in include/... and lib/... with the
utils/sort_includes.py script.

Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.

llvm-svn: 171362
2013-01-02 10:22:59 +00:00
NAKAMURA Takumi
34a5f1d7af Target/R600: Update MIB according to r170588.
llvm-svn: 170620
2012-12-20 00:22:11 +00:00
Tom Stellard
7089b892dd R600: New control flow for SI v2
This patch replaces the control flow handling with a new
pass which structurize the graph before transforming it to
machine instruction. This has a couple of different advantages
and currently fixes 20 piglit tests without a single regression.

It is now a general purpose transformation that could be not
only be used for SI/R6xx, but also for other hardware
implementations that use a form of structurized control flow.

v2: further cleanup, fixes and documentation

Patch by: Christian König

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 170591
2012-12-19 22:10:31 +00:00
Tom Stellard
6f17e7033b Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
2012-12-11 21:25:42 +00:00