Chris Lattner
80b3a56774
Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.
...
llvm-svn: 47067
2008-02-13 17:24:14 +00:00
Chris Lattner
57f2088225
don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS.
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DAGCombine is now quite good at zapifying them.
llvm-svn: 47053
2008-02-13 07:35:30 +00:00
Nate Begeman
5f18794295
readme updates
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llvm-svn: 47051
2008-02-13 07:06:12 +00:00
Nate Begeman
1867c6c264
Make register scavenging happy by not using a reg (CR0) that isn't defined
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llvm-svn: 47045
2008-02-13 02:58:33 +00:00
Evan Cheng
4b37f5ff05
commuteInstr() can now commute non-ssa machine instrs.
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llvm-svn: 47043
2008-02-13 02:46:49 +00:00
Dan Gohman
09023887f8
Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
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Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.
llvm-svn: 47039
2008-02-13 00:35:47 +00:00
Dale Johannesen
4621e574c9
__DATA not __DATA__ is the right segment name on darwin.
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Spotted by Nick Kledzik.
llvm-svn: 47037
2008-02-12 23:35:09 +00:00
Nate Begeman
589ecad41d
Remove some dead code
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llvm-svn: 47036
2008-02-12 22:54:40 +00:00
Nate Begeman
810b85bde8
SSE4.1 64b integer insert/extract pattern support
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Move formats into the formats file
llvm-svn: 47035
2008-02-12 22:51:28 +00:00
Evan Cheng
b05b05aba5
Revert r46916 PPCTargetAsmInfo.cpp.
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llvm-svn: 47020
2008-02-12 19:25:12 +00:00
Evan Cheng
e3ddcfa588
Only using x86-64 rip relative addressing in non-staic mode?
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llvm-svn: 47019
2008-02-12 19:20:46 +00:00
Evan Cheng
c3875c88a7
Update comment.
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llvm-svn: 47002
2008-02-12 07:59:55 +00:00
Evan Cheng
075ce702eb
Unbreak various insert_vector_elt and extract_vector_elt tests in presence of SSE4.
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llvm-svn: 47001
2008-02-12 07:59:45 +00:00
Nate Begeman
5c59b16468
Stuff noticed while grepping code
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llvm-svn: 46979
2008-02-11 23:47:56 +00:00
Nate Begeman
5a4e290b70
Enable SSE4 codegen and pattern matching.
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Add some notes to the README.
llvm-svn: 46949
2008-02-11 04:19:36 +00:00
Nate Begeman
9e8b2ffd52
additional missing feature
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llvm-svn: 46948
2008-02-11 04:16:09 +00:00
Nate Begeman
297d683980
xmm0 variable blends
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llvm-svn: 46931
2008-02-10 18:47:57 +00:00
Dan Gohman
cabaec582f
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Nick Lewycky
b072c0b3ed
Match GCC's behaviour for these sections.
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llvm-svn: 46916
2008-02-10 00:03:54 +00:00
Nate Begeman
2627ffd14b
memopv16i8 had wrong alignment requirement, would have broken pabsb
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pabs{b,w,d} are not two address
fix extract-to-mem sse4 ops
add sse4 vector sign extend nodes
llvm-svn: 46915
2008-02-09 23:46:37 +00:00
Nate Begeman
a78c35a368
Skeleton of insert and extract matching, more to come
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llvm-svn: 46902
2008-02-09 01:38:08 +00:00
Nate Begeman
336fba2146
Tablegen support for insert & extract element matching
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llvm-svn: 46901
2008-02-09 01:37:05 +00:00
Evan Cheng
90f03a0b88
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
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llvm-svn: 46893
2008-02-08 21:20:40 +00:00
Dale Johannesen
9bbfeaea4d
64-bit (MMX) vectors do not need restrictive alignment.
...
128-bit vectors need it only when SSE is on.
llvm-svn: 46890
2008-02-08 19:48:20 +00:00
Dan Gohman
d1cc100aef
Avoid needlessly casting away const qualifiers.
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llvm-svn: 46877
2008-02-08 03:29:40 +00:00
Evan Cheng
b2bc19ee5b
Added missing entries in X86 load / store folding tables.
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llvm-svn: 46866
2008-02-08 00:12:56 +00:00
Dan Gohman
eb7c8e4f6b
Follow Chris' suggestion; change the PseudoSourceValue accessors
...
to return pointers instead of references, since this is always what
is needed.
llvm-svn: 46857
2008-02-07 18:41:25 +00:00
Dan Gohman
3af6eba3dd
Add SourceValue information for outgoing argument stores on x86.
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llvm-svn: 46854
2008-02-07 16:28:05 +00:00
Evan Cheng
a377b2bbd1
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
...
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
llvm-svn: 46850
2008-02-07 08:53:49 +00:00
Evan Cheng
92635b3d94
In some cases, e.g. ADD32ri, no transformation is made. Guide against it.
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llvm-svn: 46849
2008-02-07 08:29:53 +00:00
Dan Gohman
f00842e086
Re-apply the memory operand changes, with a fix for the static
...
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
llvm-svn: 46827
2008-02-06 22:27:42 +00:00
Evan Cheng
e509232483
Move to getCALLSEQ_END to ensure CALLSEQ_END node produces a flag. This is consistent with the definition in td file.
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llvm-svn: 46775
2008-02-05 22:44:06 +00:00
Dale Johannesen
e8fa3130f8
Implement sseregparm.
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llvm-svn: 46764
2008-02-05 20:46:33 +00:00
Nate Begeman
9f4245c16a
Ident mnemonics appropriately
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llvm-svn: 46746
2008-02-05 08:49:09 +00:00
Evan Cheng
1c67dcaae7
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
...
llvm-svn: 46724
2008-02-04 23:06:48 +00:00
Nate Begeman
2b00217d58
This method should be virtual
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llvm-svn: 46723
2008-02-04 23:04:24 +00:00
Nate Begeman
8285430ed7
Eliminate some redundant code.
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llvm-svn: 46720
2008-02-04 21:44:06 +00:00
Nate Begeman
16830a34c4
The rest of the SSE4.1 intrinsic patterns that are obvious to me. Getting
...
Evan's help with the rest.
llvm-svn: 46697
2008-02-04 06:00:24 +00:00
Nate Begeman
ee7503810f
Some more SSE 4.1 intrinsic patterns.
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llvm-svn: 46696
2008-02-04 05:34:34 +00:00
Nate Begeman
ead8dfeef2
SSE 4.1 Intrinsics and detection
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llvm-svn: 46681
2008-02-03 07:18:54 +00:00
Chris Lattner
e926ece00b
explicitly include Compiler.h instead of getting it from tblgen in the middle of a class.
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llvm-svn: 46676
2008-02-03 05:43:57 +00:00
Chris Lattner
df36b95e00
don't do ReplaceUses on a result that doesn't exist.
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llvm-svn: 46673
2008-02-03 03:20:59 +00:00
Evan Cheng
f61d1115af
Get rid of the annoying blank lines before labels.
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llvm-svn: 46667
2008-02-02 08:39:46 +00:00
Nick Lewycky
78e2e2cd07
Don't use uninitialized values. Fixes vec_align.ll on X86 Linux.
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llvm-svn: 46666
2008-02-02 08:29:58 +00:00
Evan Cheng
dd8d07749a
Unbreak ppc debug support.
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llvm-svn: 46665
2008-02-02 05:06:29 +00:00
Evan Cheng
c57ec111f2
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
...
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
llvm-svn: 46659
2008-02-02 04:07:54 +00:00
Evan Cheng
9ff6b89bd9
Frame index can be negative.
...
llvm-svn: 46655
2008-02-02 00:17:00 +00:00
Lauro Ramos Venancio
563e0a3ea3
CBackend: Implement unaligned load/store.
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llvm-svn: 46646
2008-02-01 21:25:59 +00:00
Evan Cheng
d6222fc11d
Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before.
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llvm-svn: 46635
2008-02-01 09:10:45 +00:00
Evan Cheng
2a533e6894
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
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llvm-svn: 46623
2008-01-31 21:00:00 +00:00