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8137f1aef2
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32962 Commits

Author SHA1 Message Date
Chris Lattner
8137f1aef2 Implement some hooks, make printOperand abort if unknown modifiers are 
present.

llvm-svn: 84613
 2009-10-20 06:15:28 +00:00
Chris Lattner
dfe75a5667 t2MOVi32imm is currently always lowered by the Thumb2ITBlockPass. 
llvm-svn: 84611
 2009-10-20 05:58:02 +00:00
Daniel Dunbar
87b361d3d6 Wire up the ARM MCInst printer, for llvm-mc. 
llvm-svn: 84600
 2009-10-20 05:15:36 +00:00
Dan Gohman
b1528d73d1 Re-apply r84295, with fixes to how the loop "top" and "bottom" blocks are 
tracked. Instead of trying to manually keep track of these locations
while doing complex modifications, just recompute them when they're needed.
This fixes a bug in which the TopMBB and BotMBB were not correctly updated,
leading to invalid transformations.

llvm-svn: 84598
 2009-10-20 04:50:37 +00:00
Evan Cheng
54a5544dd7 Trim unnecessary includes. 
llvm-svn: 84597
 2009-10-20 04:23:20 +00:00
Dan Gohman
1fe811cd09 Add getTopBlock and getBottomBlock member functions to MachineLoopInfo. 
llvm-svn: 84596
 2009-10-20 04:16:37 +00:00
Jim Grosbach
ea8ab9a323 Now that all ARM subtargets use frame index scavenging, the Thumb1 requires* 
functions are not needed.

llvm-svn: 84587
 2009-10-20 01:32:47 +00:00
Evan Cheng
029a85b791 If the physical register being spilled does not have an interval, spill its sub-registers instead. 
llvm-svn: 84586
 2009-10-20 01:31:09 +00:00
Jim Grosbach
c4acd85bfd Enable post-pass frame index register scavenging for ARM and Thumb2 
llvm-svn: 84585
 2009-10-20 01:26:58 +00:00
Chris Lattner
8b2fb5c12a lower ARM::MOVi32imm properly. 
llvm-svn: 84583
 2009-10-20 01:11:37 +00:00
Chris Lattner
b345825d9e add support for external symbols. The mc instprinter can now handle 
reasonable code like Codegen/ARM/2009-02-27-SpillerBug.ll, producing 
identical output except for superior formatting of constant pool entries.

llvm-svn: 84582
 2009-10-20 00:56:16 +00:00
Chris Lattner
510ca3ebd7 get fancy: support basic block operands. Yay for jumps. 
llvm-svn: 84579
 2009-10-20 00:52:47 +00:00
Chris Lattner
279abd0841 add supprort for the 'sbit' operand, MOVi apparently has one. 
llvm-svn: 84577
 2009-10-20 00:46:11 +00:00
Chris Lattner
18bc7716d6 add support for instruction predicates. 
llvm-svn: 84575
 2009-10-20 00:42:49 +00:00
Chris Lattner
976978de4a implement printSORegOperand, add lowering for the nasty and despicable MOVi2pieces :) 
llvm-svn: 84573
 2009-10-20 00:40:56 +00:00
Jim Grosbach
ea7293494f Refs: A8-598. 
Leave Inst{11-8}, which represents the starting byte index of the extracted
result in the concatenation of the operands and is left unspecified.

Patch by Johnny Chen.

llvm-svn: 84572
 2009-10-20 00:38:19 +00:00
Jim Grosbach
aaa0e97800 Add missing encoding bits to NLdSt class of instructions. 
Patch by Johnny Chen.

llvm-svn: 84570
 2009-10-20 00:19:08 +00:00
Chris Lattner
db0e4f883d X86 should ignore implicit regs when lowering to MCInst also, 
no functionality change.

llvm-svn: 84567
 2009-10-19 23:35:57 +00:00
Chris Lattner
8a38b12ffe handle addmode4 modifiers, fix a fixme in printRegisterList 
by ignoring all implicit regs when lowering.

llvm-svn: 84566
 2009-10-19 23:31:43 +00:00
Chris Lattner
5630502650 simplify by using the twine form of GetOrCreateSymbol 
llvm-svn: 84565
 2009-10-19 23:05:23 +00:00
Jim Grosbach
2fb5eb1264 Enable allocation of R3 in Thumb1 
llvm-svn: 84563
 2009-10-19 22:57:03 +00:00
Chris Lattner
24d265dae3 use EmitLabel instead of text emission 
llvm-svn: 84562
 2009-10-19 22:51:16 +00:00
Chris Lattner
df848440d1 add a twine version of MCContext::GetOrCreateSymbol. 
llvm-svn: 84561
 2009-10-19 22:49:00 +00:00
Chris Lattner
47131861be lower the ARM::CONSTPOOL_ENTRY pseudo op, giving us constant pool entries 
like:

@ BB#1:
	.align	2
LCPI1_0:
	.long	L_.str-(LPC0+8)

Note that proper indentation of the label :)

llvm-svn: 84558
 2009-10-19 22:33:05 +00:00
Jim Grosbach
c813cf9649 Adjust the scavenge register spilling to allow the target to choose an 
appropriate restore location for the spill as well as perform the actual
save and restore.

The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.

llvm-svn: 84554
 2009-10-19 22:27:30 +00:00
Chris Lattner
ce9e652b8a add MCInstLower support for lowering ARM::PICADD, a pseudo op for pic stuffola. 
llvm-svn: 84553
 2009-10-19 22:23:04 +00:00
Owen Anderson
06714a71a9 Refactor lookup_or_add to contain _MUCH_ less duplicated code. Add support for 
numbering first class aggregate instructions while we're at it.

llvm-svn: 84547
 2009-10-19 22:14:22 +00:00
Chris Lattner
d7d7fee3fe add register list and hacked up addrmode #4 support, we now get this: 
_main:
	stmsp! sp!, {r7, lr}
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldmsp! sp!, {r7, pc}

Note the unhappy ldm/stm because of modifiers being ignored.

llvm-svn: 84546
 2009-10-19 22:09:23 +00:00
Chris Lattner
8124977463 revert r84540, fixing build breakage I didn't see because of 
broken makefile deps :(

llvm-svn: 84544
 2009-10-19 21:59:25 +00:00
Chris Lattner
30baeae77d add addrmode2 support, getting us up to: 
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldm , 

llvm-svn: 84543
 2009-10-19 21:57:05 +00:00
Chris Lattner
ec500c80c6 add jump tables, constant pools and some trivial global 
lowering stuff.  We can now compile hello world to:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 
	ldr r0, 
	bl _printf
	ldr r0, 
	mov sp, r7
	ldm , 

Almost looks like arm code :)

llvm-svn: 84542
 2009-10-19 21:53:00 +00:00
Victor Hernandez
a666c49572 Malloc calls are marked NoAlias, so the code below the isMalloc() check makes it redundant. Removing the isMalloc() check. 
llvm-svn: 84541
 2009-10-19 21:47:22 +00:00
Chris Lattner
4b35be3f3b pass mangler in as a reference instead of a pointer. 
llvm-svn: 84540
 2009-10-19 21:45:31 +00:00
Chris Lattner
3755b735a0 reduce #includes 
llvm-svn: 84536
 2009-10-19 21:23:15 +00:00
Chris Lattner
4318ab8ce7 add printing support for SOImm operands, getting us to: 
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 

llvm-svn: 84535
 2009-10-19 21:21:39 +00:00
Owen Anderson
4954f8ef02 Simplify some code. 
llvm-svn: 84533
 2009-10-19 21:14:57 +00:00
Chris Lattner
241c56bee6 wire up some basic printOperand goodness, giving us stuff like this before 
we abort:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, 
	mov r0, 
	str r0, 

llvm-svn: 84532
 2009-10-19 20:59:55 +00:00
Chris Lattner
cd8bd77b64 add the files that go with the previous rev 
llvm-svn: 84531
 2009-10-19 20:21:05 +00:00
Chris Lattner
72c89de0e0 wire up skeletal support for having llc print instructions 
through mcinst lowering -> mcinstprinter, when llc is passed
the -enable-arm-mcinst-printer flag.  Currently this
is very "aborty".

llvm-svn: 84530
 2009-10-19 20:20:46 +00:00
Owen Anderson
fb4db70d0f Banish ConstantsLock. It's serving no purpose other than slowing things down 
at the moment.

llvm-svn: 84529
 2009-10-19 20:11:52 +00:00
Chris Lattner
d2f263e74f wire up ARM's printMCInst method. Now llvm-mc should be able to produce 
"something" when printing MCInsts, it will just be missing all the 
operand info.

llvm-svn: 84528
 2009-10-19 19:59:05 +00:00
Chris Lattner
11fcbad759 stub out a minimal ARMInstPrinter. 
llvm-svn: 84527
 2009-10-19 19:56:26 +00:00
Chris Lattner
cf8c23d554 remove strings from instructions who are never asmprinted. 
All of these "subreg32" modifier instructions are handled
explicitly by the MCInst lowering phase.  If they got to
the asmprinter, they would explode.  They should eventually
be replace with correct use of subregs.

llvm-svn: 84526
 2009-10-19 19:51:42 +00:00
Jeffrey Yasskin
fdb36c1a29 Clean up the JITResolver stub/callsite<->function maps. 
The JITResolver maps Functions to their canonical stubs and all callsites for
lazily-compiled functions to their target Functions. To make Function
destruction work, I'm going to need to remove all callsites on destruction, so
this patch also adds the reverse mapping for that.

There was an incorrect assumption in here that the only stub for a function
would be the one caused by needing to lazily compile it, while x86-64 far calls
and dlsym-stubs could also cause such stubs, but I didn't look for a test case
that the assumption broke.

This also adds DenseMapInfo<AssertingVH> so I can use DenseMaps instead of
std::maps.

llvm-svn: 84522
 2009-10-19 18:49:59 +00:00
Chris Lattner
e3469a4209 simplify code, reducing string thrashing. 
llvm-svn: 84521
 2009-10-19 18:49:14 +00:00
Chris Lattner
1816e314c6 switch hidden gv stubs to use MachineModuleInfoMachO instead of a custom map. 
llvm-svn: 84520
 2009-10-19 18:44:38 +00:00
Chris Lattner
b73edceec4 use MachineModuleInfoMachO for non-lazy gv stubs instead of a private map. 
llvm-svn: 84519
 2009-10-19 18:38:33 +00:00
Anton Korobeynikov
26ed697cf2 Revert r84295, this unbreaks llvm-gcc bootstrap on x86-64/linux 
llvm-svn: 84516
 2009-10-19 18:21:09 +00:00
Chris Lattner
e7ea33c824 remove dead map 
llvm-svn: 84513
 2009-10-19 18:11:25 +00:00
Chris Lattner
1598caa700 don't bother trying to avoid emitting redundant constant pool alignment directives. 
llvm-svn: 84512
 2009-10-19 18:08:02 +00:00