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Commit Graph

43 Commits

Author SHA1 Message Date
Dan Bailey
2237ea06fb PTX: Add support for i8 type and introduce associated .b8 registers
The i8 type is required for boolean values, but can only use ld, st and mov instructions. The i1 type continues to be used for predicates.

llvm-svn: 133814
2011-06-24 19:27:10 +00:00
Justin Holewinski
5e20d4dbfc PTX: Re-work target sm/compute selection and add some basic GPU
targets: g80, gt200, gf100(fermi)

llvm-svn: 133799
2011-06-24 16:27:49 +00:00
Justin Holewinski
67c23366fd PTX: Prevent DCE from eliminating st.param calls, and unify the handling of
st.param and ld.param

FIXME: Test cases still need to be updated
llvm-svn: 133733
2011-06-23 18:10:05 +00:00
Justin Holewinski
bdf03838a5 PTX: Use .param space for parameters in device functions for SM >= 2.0
FIXME: DCE is eliminating the final st.param.x calls, figure out why
llvm-svn: 133732
2011-06-23 18:10:03 +00:00
Justin Holewinski
376f1d46d4 PTX: Add signed integer comparisons
llvm-svn: 133599
2011-06-22 02:09:50 +00:00
Justin Holewinski
e62da847fa PTX: Fix conversion between predicates and value types
llvm-svn: 133454
2011-06-20 18:42:48 +00:00
Justin Holewinski
a5d3db3bd2 PTX: Add basic register spilling code
The current implementation generates stack loads/stores, which are
really just mov instructions from/to "special" registers.  This may
not be the most efficient implementation, compared to an approach where
the stack registers are directly folded into instructions, but this is
easier to implement and I have yet to see a case where ptxas is unable
to see through this kind of register usage and know what is really
going on.

llvm-svn: 133443
2011-06-20 15:56:20 +00:00
Justin Holewinski
c515f1b903 PTX: Adjust rounding modes
* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)

Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.

All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.

Patch by Dan Bailey

llvm-svn: 133253
2011-06-17 12:12:42 +00:00
Justin Holewinski
a8d46115ce PTX: Rename register classes for readability and combine int and fp registers
llvm-svn: 133171
2011-06-16 17:49:58 +00:00
Justin Holewinski
eb209f0916 PTX: add flag to disable mad/fma selection
Patch by Dan Bailey

llvm-svn: 131537
2011-05-18 15:42:23 +00:00
Justin Holewinski
ecdabf3295 PTX: add PTX 2.3 setting in PTX sub-target.
Patch by Wei-Ren Chen

llvm-svn: 131123
2011-05-10 12:32:11 +00:00
Justin Holewinski
a042c76db5 PTX: support for select
- selection of SELP instruction
- new selp.ll test

Patch by Dan Bailey

llvm-svn: 130357
2011-04-28 00:19:55 +00:00
Justin Holewinski
c1013e6801 PTX: mov fix and rounding correction for cvt
- fix typo in MOV
- correct fp rounding on CVT
- new cvt.ll test

Patch by Dan Bailey

llvm-svn: 130356
2011-04-28 00:19:54 +00:00
Justin Holewinski
405d24712b PTX: support for fneg
- selection of FNEG instruction
- new fneg.ll test

Patch by Dan Bailey

llvm-svn: 130355
2011-04-28 00:19:53 +00:00
Justin Holewinski
bde9352742 PTX: support for bitwise operations on predicates
- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test

Patch by Dan Bailey

llvm-svn: 130353
2011-04-28 00:19:51 +00:00
Justin Holewinski
dc1965a16c PTX: Add intrinsics to list of built-in intrinsics, which allows them to be
used by Clang.  To help Clang integration, the PTX target has been split
     into two targets: ptx32 and ptx64, depending on the desired pointer size.

- Add GCCBuiltin class to all intrinsics
- Split PTX target into ptx32 and ptx64

llvm-svn: 129851
2011-04-20 15:37:17 +00:00
Che-Liang Chiou
a1aa7de4a9 ptx: add integer div and rem instruction
Patched by Dan Bailey

llvm-svn: 129848
2011-04-20 09:28:55 +00:00
Che-Liang Chiou
1792164516 ptx: add floating-point comparison to setp
Patched by Dan Bailey

llvm-svn: 129847
2011-04-20 09:28:20 +00:00
Che-Liang Chiou
c4a22b7cd5 ptx: support setp's 4-operand format
llvm-svn: 128767
2011-04-02 08:51:39 +00:00
Che-Liang Chiou
a4ae414c30 ptx: clean up branch code a bit
llvm-svn: 128405
2011-03-28 10:23:13 +00:00
Justin Holewinski
8861d34661 PTX: Improve support for 64-bit addressing
- Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses
- Add comparison selection for i64
- Add zext selection for i32 -> i64
- Add shl/shr/sha support for i64

llvm-svn: 128153
2011-03-23 16:58:51 +00:00
Che-Liang Chiou
7c5fc3a68f ptx: add analyze/insert/remove branch
llvm-svn: 128084
2011-03-22 14:12:00 +00:00
Justin Holewinski
d9c382441b PTX: Fix various codegen issues
- Emit mad instead of mad.rn for shader model 1.0
- Emit explicit mov.u32 instructions for reading global variables
- (most PTX instructions cannot take global variable immediates)

llvm-svn: 127895
2011-03-18 19:24:28 +00:00
Che-Liang Chiou
f4a2c17cf5 ptx: add unconditional and conditional branch
llvm-svn: 127873
2011-03-18 11:08:52 +00:00
Justin Holewinski
8948485aa7 PTX: Set PTX 2.0 as the minimum supported version
- Remove PTX 1.4 code generation
- Change type of intrinsics to .v4.i32 instead of .v4.i16
- Add and/or/xor integer instructions

llvm-svn: 127677
2011-03-15 13:24:15 +00:00
Justin Holewinski
995d10cfea PTX: Add support for sqrt/sin/cos intrinsics
llvm-svn: 127578
2011-03-14 14:09:33 +00:00
Che-Liang Chiou
6ff0aa8ab3 ptx: add set.p instruction and related changes to predicate execution
llvm-svn: 127577
2011-03-14 11:26:01 +00:00
Justin Holewinski
a26d2f782e PTX: Add preliminary support for floating-point divide and multiply-and-add
llvm-svn: 127410
2011-03-10 16:57:18 +00:00
Che-Liang Chiou
15aba09539 ptx: add basic intrinsic support
llvm-svn: 127084
2011-03-05 14:17:37 +00:00
Che-Liang Chiou
3529b49230 Add 64-bit addressing to PTX backend
- Add '64bit' sub-target option.
- Select 32-bit/64-bit loads/stores based on '64bit' option.
- Fix function parameter order.

Patch by Justin Holewinski

llvm-svn: 126837
2011-03-02 07:36:48 +00:00
Che-Liang Chiou
2e7bb6da4c Extend initial support for primitive types in PTX backend
- Allow i16, i32, i64, float, and double types, using the native .u16,
  .u32, .u64, .f32, and .f64 PTX types.
- Allow loading/storing of all primitive types.
- Allow primitive types to be passed as parameters.
- Allow selection of PTX Version and Shader Model as sub-target attributes.
- Merge integer/floating-point test cases for load/store.
- Use .u32 instead of .s32 to conform to output from NVidia nvcc compiler.

Patch by Justin Holewinski

llvm-svn: 126824
2011-03-02 03:20:28 +00:00
Che-Liang Chiou
4026d01040 Add preliminary support for .f32 in the PTX backend.
- Add appropriate TableGen patterns for fadd, fsub, fmul.
- Add .f32 as the PTX type for the LLVM float type.
- Allow parameters, return values, and global variable declarations
  to accept the float type.
- Add appropriate test cases.

Patch by Justin Holewinski

llvm-svn: 126636
2011-02-28 06:34:09 +00:00
Che-Liang Chiou
762ff2a943 ptx: add passing parameter to kernel functions
llvm-svn: 125279
2011-02-10 12:01:24 +00:00
Che-Liang Chiou
a188cfb574 ptx: remove reg-reg addressing mode and st.const
llvm-svn: 122653
2011-01-01 11:58:58 +00:00
Che-Liang Chiou
995a853724 ptx: add store instruction
llvm-svn: 122652
2011-01-01 10:50:37 +00:00
Che-Liang Chiou
f4aaa1b2e1 ptx: add state spaces
llvm-svn: 122638
2010-12-30 10:41:27 +00:00
Che-Liang Chiou
e73ad4387e ptx: add ld instruction and test
llvm-svn: 122398
2010-12-22 10:38:51 +00:00
Che-Liang Chiou
cd2878d421 ptx: add shift instructions
llvm-svn: 120982
2010-12-06 04:00:03 +00:00
Che-Liang Chiou
df20cec4fb ptx: add ld instruction
support register and register-immediate addressing mode

todo: immediate and register-register addressing mode
llvm-svn: 120407
2010-11-30 07:34:44 +00:00
Che-Liang Chiou
f8ffd59ccb Add simple arithmetics and %type directive for PTX
llvm-svn: 119485
2010-11-17 08:08:49 +00:00
Che-Liang Chiou
bc4f00f42d Add lower argument and return of device function
llvm-svn: 116805
2010-10-19 13:14:40 +00:00
Che-Liang Chiou
0eaf890a31 Add ret instruction to PTX backend
llvm-svn: 114788
2010-09-25 07:46:17 +00:00
Eric Christopher
2901b19344 Add the exit instruction to the PTX target.
Patch by Che-Liang Chiou <clchiou@gmail.com>!

llvm-svn: 114294
2010-09-18 18:52:28 +00:00