Vincent Lejeune
439c29a29d
R600: Move code handling literal folding into R600ISelLowering.
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llvm-svn: 190644
2013-09-12 23:44:53 +00:00
Vincent Lejeune
4a8c23c168
R600: Non vector only instruction can be scheduled on trans unit
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llvm-svn: 189980
2013-09-04 19:53:46 +00:00
Tom Stellard
9da87c6553
R600: Enable folding of inline literals into REQ_SEQUENCE instructions
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Tested-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 188517
2013-08-16 01:11:55 +00:00
Tom Stellard
c6c9cd5b09
Revert "R600: Non vector only instruction can be scheduled on trans unit"
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This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6.
llvm-svn: 187526
2013-07-31 20:43:27 +00:00
Vincent Lejeune
2100f94811
R600: Non vector only instruction can be scheduled on trans unit
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llvm-svn: 187514
2013-07-31 19:31:56 +00:00
Tom Stellard
cf58aac74c
DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free
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This commit also implements these functions for R600 and removes a test
case that was relying on the buggy behavior.
llvm-svn: 187007
2013-07-23 23:55:03 +00:00
Tom Stellard
e60bb5f272
R600: Use KCache for kernel arguments
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Reviewed-by: Vincent Lejeune <vljn at ovi.com>
llvm-svn: 186918
2013-07-23 01:48:18 +00:00
Vincent Lejeune
5d7b2a4aea
R600: Signed literals are 64bits wide
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llvm-svn: 180960
2013-05-02 21:53:03 +00:00
Vincent Lejeune
62da1453e1
R600: Prettier asmPrint of Alu
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llvm-svn: 180956
2013-05-02 21:52:30 +00:00
Benjamin Kramer
202c1b8357
Test case hygiene.
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llvm-svn: 176772
2013-03-09 18:25:40 +00:00
Tom Stellard
be6496bed8
R600: Emit function name in the AsmPrinter
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Emitting the function name allows us to check for it in the FileCheck
tests so we can make sure FileCheck is checking the output of the
correct function.
llvm-svn: 174392
2013-02-05 17:09:11 +00:00
Tom Stellard
6f17e7033b
Add R600 backend
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A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX
llvm-svn: 169915
2012-12-11 21:25:42 +00:00
