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Commit Graph

1581 Commits

Author SHA1 Message Date
Jim Grosbach
85838cdb51 Thumb2 assembly parsing and encoding for SHSUB16/SHSUB8.
llvm-svn: 139880
2011-09-15 23:58:56 +00:00
Jim Grosbach
eee3717b95 Thumb2 assembly parsing and encoding for SHADD16/SHADD8.
llvm-svn: 139871
2011-09-15 22:36:10 +00:00
Jim Grosbach
423aae30b2 Thumb2 assembly parsing and encoding for SHASX/SHSAX.
llvm-svn: 139870
2011-09-15 22:34:29 +00:00
Jim Grosbach
68e3ea237e Thumb2 assembly parsing and encoding for SEV.W.
llvm-svn: 139866
2011-09-15 22:24:20 +00:00
Jim Grosbach
29e503aec9 Thumb2 assembly parsing and encoding for SEL.
llvm-svn: 139861
2011-09-15 22:01:09 +00:00
Jim Grosbach
b9ba7e59b7 Thumb2 assembly parsing and encoding for SBFX.
llvm-svn: 139858
2011-09-15 21:58:42 +00:00
Jim Grosbach
aeb7320fa5 Add some missing 'CHECK' lines and tidy up others.
llvm-svn: 139849
2011-09-15 21:17:38 +00:00
Jim Grosbach
8ceb22b769 Thumb2 assembly parsing and encoding for SBC.
llvm-svn: 139844
2011-09-15 21:04:10 +00:00
Jim Grosbach
1ac9dd8a72 Thumb2 assembly parsing and encoding for SASX.
llvm-svn: 139843
2011-09-15 21:01:23 +00:00
Jim Grosbach
eaeb10930f Thumb2 assembly parsing and encoding for SADD16/SADD8.
llvm-svn: 139841
2011-09-15 20:57:39 +00:00
Jim Grosbach
553692fcce Thumb2 assembly parsing and encoding for RSB.
llvm-svn: 139839
2011-09-15 20:54:14 +00:00
Jim Grosbach
267610ed2a Thumb2 assembly parsing and encoding for RRX.
llvm-svn: 139831
2011-09-15 19:52:43 +00:00
Jim Grosbach
ee202d43fe Thumb2 assembly parsing and encoding for ROR.
llvm-svn: 139830
2011-09-15 19:50:04 +00:00
Jim Grosbach
50ee930e9a Thumb2 assembly parsing and encoding for REV16/REVSH.
llvm-svn: 139828
2011-09-15 19:46:13 +00:00
Jim Grosbach
9d7aa9bcbc Thumb2 assembly parsing and encoding for REV.
llvm-svn: 139813
2011-09-15 18:13:30 +00:00
Jim Grosbach
7c1422b068 Thumb2 assembly parsing and encoding for RBIT.
llvm-svn: 139811
2011-09-15 18:07:14 +00:00
Jim Grosbach
d6993cb54c Thumb2 assembly parsing and encoding for signed saturating arithmetic insns.
llvm-svn: 139810
2011-09-15 18:06:15 +00:00
Jim Grosbach
5742cbd63f Re-order test.
llvm-svn: 139795
2011-09-15 16:04:13 +00:00
Jim Grosbach
68de69f1c9 Thumb2 assembly parsing and encoding for PLI.
llvm-svn: 139757
2011-09-14 23:29:05 +00:00
Jim Grosbach
4d7b859fab Thumb2 assembly parsing and encoding for PLD.
llvm-svn: 139756
2011-09-14 23:26:12 +00:00
Jim Grosbach
669e269758 Thumb2 assembly parsing and encoding for PKH.
llvm-svn: 139754
2011-09-14 23:16:41 +00:00
Owen Anderson
86f1fb2955 Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs.
llvm-svn: 139747
2011-09-14 22:46:14 +00:00
Jim Grosbach
3908f7f2b7 Thumb2 assembly parsing and encoding for ORR.
llvm-svn: 139742
2011-09-14 21:43:57 +00:00
Jim Grosbach
4d891badcb Thumb2 assembly parsing and encoding for ORN.
llvm-svn: 139741
2011-09-14 21:29:54 +00:00
Jim Grosbach
528142a13d Thumb2 assembly parsing and encoding for NOP.W.
llvm-svn: 139740
2011-09-14 21:26:25 +00:00
Jim Grosbach
e841adae12 Thumb2 assembly parsing and encoding for MVN.
llvm-svn: 139739
2011-09-14 21:24:41 +00:00
Jim Grosbach
585e3c779f Thumb2 assembly parsing and encoding for MUL.
llvm-svn: 139735
2011-09-14 21:00:40 +00:00
Jim Grosbach
b1c70aab3e Thumb2 assembly parsing and encoding for MSR/MRS.
Fix a bug in handling default flags for both ARM and Thumb encodings.

llvm-svn: 139721
2011-09-14 20:03:46 +00:00
Jim Grosbach
e260140b99 Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2.
llvm-svn: 139717
2011-09-14 19:28:49 +00:00
Jim Grosbach
807e68b8db Thumb2 assembly parsing and encoding for MOVT.
llvm-svn: 139715
2011-09-14 19:15:15 +00:00
Jim Grosbach
932d409524 Thumb2 assembly parsing for MOV in IT block.
Select the right 16 vs. 32 bit encoding in an IT block.

llvm-svn: 139714
2011-09-14 19:12:11 +00:00
Jim Grosbach
41c8bdfdd9 ARM fix assembly parser handling of ranges in register lists.
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573

llvm-svn: 139707
2011-09-14 18:08:35 +00:00
Craig Topper
60719c7bfb Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler.
llvm-svn: 139691
2011-09-14 06:41:26 +00:00
Craig Topper
25e81ae604 Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fixes PR10917.
llvm-svn: 139690
2011-09-14 05:55:28 +00:00
Craig Topper
d707457c41 Add test case for PR10851.
llvm-svn: 139689
2011-09-14 04:36:54 +00:00
Owen Anderson
1037a3e60b Make use of Eli's FileCheck sorcery to improve this test.
llvm-svn: 139645
2011-09-13 21:37:50 +00:00
Owen Anderson
d0121fe635 Correct disassembly printing of Thumb2 post-incremented LDRD and STRD.
llvm-svn: 139639
2011-09-13 20:46:26 +00:00
Owen Anderson
b4ed08c465 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally.
llvm-svn: 139610
2011-09-13 17:59:19 +00:00
Owen Anderson
5982d4d51b Fix encoding of Thumb2 shifted register operands with RRX shifts.
llvm-svn: 139606
2011-09-13 17:34:32 +00:00
Craig Topper
03c833ff84 Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848.
llvm-svn: 139588
2011-09-13 06:54:58 +00:00
Owen Anderson
ebcf543265 Fix a failing ELF Thumb test. I _think_ this is right, but it's not totally clear to me what this test is doing. Could someone on an ELF platform check?
llvm-svn: 139549
2011-09-12 22:40:31 +00:00
Owen Anderson
a1a10ed5c6 Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either.
llvm-svn: 139542
2011-09-12 21:28:46 +00:00
Owen Anderson
0081444d87 Fix encoding of PC-relative LDRSHW with an immediate offset.
llvm-svn: 139537
2011-09-12 20:36:51 +00:00
Owen Anderson
05ef2c122d Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered.
llvm-svn: 139522
2011-09-12 18:56:30 +00:00
Craig Topper
5ffd0cb080 Fix disassembling of one of the register/register forms of MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877.
llvm-svn: 139486
2011-09-11 23:19:54 +00:00
Craig Topper
a9b27eecc9 Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV.
llvm-svn: 139485
2011-09-11 21:41:45 +00:00
Craig Topper
8361de67b5 Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W.
llvm-svn: 139484
2011-09-11 20:23:20 +00:00
Jim Grosbach
52492b1cf3 Thumb2 parsing and encoding for MOV(immediate).
Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.

llvm-svn: 139440
2011-09-10 00:15:36 +00:00
Owen Anderson
9cd21ce8c9 LDM writeback is not allowed if Rn is in the target register list.
llvm-svn: 139432
2011-09-09 23:13:33 +00:00
Owen Anderson
dbe77fc5a1 Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands.
llvm-svn: 139422
2011-09-09 22:24:36 +00:00