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15506 Commits

Author SHA1 Message Date
Jim Grosbach
4ad95fa930 trailing whitespace 
llvm-svn: 115136
 2010-09-30 03:21:00 +00:00
Jim Grosbach
5b0ae02149 Remove misplaced ';'. Make buildbots happy, hopefully. 
llvm-svn: 115135
 2010-09-30 03:20:34 +00:00
Rafael Espindola
480ee577ad Correctly produce R_X86_64_32 or R_X86_64_32S. 
With this patch in

movq    $foo, foo(%rip)
foo:
.long   foo

We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.

llvm-svn: 115134
 2010-09-30 03:11:42 +00:00
Jason W Kim
7822e6aab5 Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() 
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.

llvm-svn: 115133
 2010-09-30 02:45:56 +00:00
Jim Grosbach
ad67153eb3 Go ahead and jump! 
Now that the MC lowering handles the expansion of the pseudos, kill the horrible
blobs of text.

llvm-svn: 115130
 2010-09-30 02:18:06 +00:00
Jason W Kim
6d7784e5f5 I added a new file ARMAsmBackend which stubs out in similar ways to 
the eqv X86 class.
For now, I split the ELFARMAsmBackend from the DarwinARMAsmBackend
(also mimicking X86)

Tested against -r115126

llvm-svn: 115129
 2010-09-30 02:17:26 +00:00
Jim Grosbach
3a7ca3301b Now that the pseudos that needed this are all custom lowered, we can go back 
to an empty PrintSpecial()

llvm-svn: 115128
 2010-09-30 02:02:22 +00:00
Jim Grosbach
efad965653 Nuke it from orbit. It's the only way to be sure. 
(Kill the dead non-MC asm printer for the ARM target.)

llvm-svn: 115127
 2010-09-30 01:57:53 +00:00
Evan Cheng
fa5d40dbff ARM instruction itinerary fixes: 
1. Cortex-a9 8-bit and 16-bit loads / stores AGU cycles are 1 cycle longer than 32-bit ones.
2. Cortex-a9 is out-of-order so model all read cycles as cycle 1.
3. Lots of other random fixes for A8 and A9.

llvm-svn: 115121
 2010-09-30 01:08:25 +00:00
Benjamin Kramer
2a44a539e2 Add constant folding for strspn and strcspn to SimplifyLibCalls. 
llvm-svn: 115116
 2010-09-30 00:58:35 +00:00
Eric Christopher
ba01048ae2 Refactor arm fast isel libcall handling so that pieces can be used 
for generic call handling.

llvm-svn: 115105
 2010-09-29 23:11:09 +00:00
Eric Christopher
80d620fb38 Noticed by inspection when looking for other cmov bits. 
llvm-svn: 115100
 2010-09-29 23:00:29 +00:00
Evan Cheng
b44d480808 Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP 
pipeline forwarding path.

llvm-svn: 115098
 2010-09-29 22:42:35 +00:00
Eric Christopher
eb578cf724 Add a convenience variable so I'm not chasing all over looking for 
a context.

llvm-svn: 115094
 2010-09-29 22:24:45 +00:00
Jim Grosbach
fd8705ab4a Add specializations of addrmode2 that allow differentiating those forms 
which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.

llvm-svn: 115066
 2010-09-29 19:03:54 +00:00
Nick Lewycky
a533bd63e6 Add parens to fix GCC warning: 
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'

llvm-svn: 115064
 2010-09-29 18:56:57 +00:00
Chris Lattner
7f466d63e0 implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions. 
llvm-svn: 115061
 2010-09-29 18:39:16 +00:00
Bob Wilson
d16aaccb05 Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. 
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.

llvm-svn: 115047
 2010-09-29 17:54:10 +00:00
Jim Grosbach
9939090a14 Add braces for legibility. 
llvm-svn: 115043
 2010-09-29 17:32:29 +00:00
Jim Grosbach
fe21554145 One Printer to rule them all, One Printer to find them, 
One Printer to lower them all and in the back end bind them.


(Remove option to use the old non-MC asm printer.)

llvm-svn: 115038
 2010-09-29 15:23:40 +00:00
Gabor Greif
e1de402213 improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2 
added some doxygen on the way

llvm-svn: 115033
 2010-09-29 10:12:08 +00:00
Chris Lattner
9c58de2dc4 fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd' 
llvm-svn: 115029
 2010-09-29 05:05:03 +00:00
Chris Lattner
890c21a20a add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382 
llvm-svn: 115027
 2010-09-29 04:55:40 +00:00
Chris Lattner
54939ddf1f make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same 
order as cctools for diffability.

llvm-svn: 115022
 2010-09-29 03:43:43 +00:00
Chris Lattner
13354d7bbc implement support for 32-bit address operands in 64-bit mode, which 
are defined to emit the 0x67 prefix byte.  rdar://8482675

llvm-svn: 115021
 2010-09-29 03:33:25 +00:00
Chris Lattner
c14d59589c add basic avx support to the disassembler, also teach it about ssmem/sdmem 
operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'

llvm-svn: 115019
 2010-09-29 02:57:56 +00:00
Chris Lattner
f90296b045 add asmparser support for cvttpd2dq by removing some Int_ prefixes. 
Clean up cvttps2dq by removing some redundant implementations of the
same instruction.  rdar://8456382

llvm-svn: 115018
 2010-09-29 02:36:32 +00:00
Chris Lattner
e5c5c8dc1f implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes. 
llvm-svn: 115017
 2010-09-29 02:24:57 +00:00
Chris Lattner
cbecb9a4d3 implement rdar://8456378 and PR7557 - support for the fstsw, 
an instruction that requires a WHOLE NEW wonderful kind of alias.

llvm-svn: 115015
 2010-09-29 01:50:45 +00:00
Chris Lattner
9b9a847b8c change the protocol TargetAsmPArser::MatchInstruction method to take an 
MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.

llvm-svn: 115014
 2010-09-29 01:42:58 +00:00
Eric Christopher
e81be3c669 Rework comparison handling to set a register on true/false. This avoids 
problems with phi-nodes in blocks that have hard and not virtual registers.

Accordingly update branch handling to compensate.

llvm-svn: 115013
 2010-09-29 01:14:47 +00:00
Eric Christopher
0bde6df6a3 Remove unnecessary set ahead of time. 
llvm-svn: 115011
 2010-09-29 00:50:57 +00:00
Evan Cheng
7eb08b1ad9 Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn. 
llvm-svn: 115010
 2010-09-29 00:49:25 +00:00
Eric Christopher
c9ebc75b88 Remove assert, add comment. 
llvm-svn: 115009
 2010-09-29 00:49:09 +00:00
Evan Cheng
7fffe3cf58 Assign bitwise binary instructions different itinerary classes from ALU instructions such as add / sub. 
llvm-svn: 115008
 2010-09-29 00:27:46 +00:00
Evan Cheng
39c462b4f1 Add support to model pipeline bypass / forwarding. 
llvm-svn: 115005
 2010-09-28 23:50:49 +00:00
Eric Christopher
2803dbc225 32-bit constant ints only for now. 
llvm-svn: 115001
 2010-09-28 22:47:54 +00:00
Oscar Fuentes
eb27a44982 Removed a bunch of unnecessary target_link_libraries. 
llvm-svn: 114999
 2010-09-28 22:39:14 +00:00
Owen Anderson
c34e1296b8 Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise 
cost modeling for if-conversion.  Now if only we had a way to estimate the misprediction probability.

Adjsut CodeGen/ARM/ifcvt10.ll.  The pipeline on Cortex-A8 is long enough that it is still profitable
to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable.

llvm-svn: 114995
 2010-09-28 21:57:50 +00:00
Eric Christopher
3024929d5a Integer materialization needed the same thinko change. 
llvm-svn: 114994
 2010-09-28 21:55:34 +00:00
Nick Lewycky
b9daeb2fd0 Resolve this GCC warning: 
ARMTargetMachine.cpp:53: error: control reaches end of non-void function

llvm-svn: 114992
 2010-09-28 21:40:26 +00:00
Anton Korobeynikov
f1be021755 User proper libcall names & condcodes while compiling for ARM EABI. 
Patch by Evzen Muller!

llvm-svn: 114991
 2010-09-28 21:39:26 +00:00
Owen Anderson
c0e1200323 Part one of switching to using a more sane heuristic for determining if-conversion profitability. 
Rather than having arbitrary cutoffs, actually try to cost model the conversion.

For now, the constants are tuned to more or less match our existing behavior, but these will be
changed to reflect realistic values as this work proceeds.

llvm-svn: 114973
 2010-09-28 18:32:13 +00:00
Jim Grosbach
7915d03313 Factor out dbg_value comment printing and teach MC asm printing to use it. 
This should make the arm-linux self-host buildbot happy again.

llvm-svn: 114964
 2010-09-28 17:05:56 +00:00
Oscar Fuentes
b8b0209acb Use the canonical library name for library PIC16Passes. 
llvm-svn: 114953
 2010-09-28 14:24:47 +00:00
Oscar Fuentes
748691cf20 Added library LLVMPIC16passes to CMake build. 
llvm-svn: 114952
 2010-09-28 14:02:45 +00:00
Oscar Fuentes
cd481d2723 Add ARM Disassembler to the CMake build. 
llvm-svn: 114949
 2010-09-28 11:48:19 +00:00
Che-Liang Chiou
cf3ce50cc0 Remove trailing spaces of MipsMachineFunction.h 
llvm-svn: 114948
 2010-09-28 10:06:53 +00:00
Che-Liang Chiou
6a72cc8a38 Remove trailing spaces of MipsTargetObjectFile.cpp 
llvm-svn: 114947
 2010-09-28 09:55:24 +00:00
Eric Christopher
bff0f1805f 80-col fixups. 
llvm-svn: 114943
 2010-09-28 04:18:29 +00:00