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865f47cbb6
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21961 Commits

Author SHA1 Message Date
Richard Smith
865f47cbb6 Fix integer undefined behavior due to signed left shift overflow in LLVM. 
Reviewed offline by chandlerc.

llvm-svn: 162623
 2012-08-24 23:29:28 +00:00
Jakob Stoklund Olesen
d1820cea0b Add missing mayLoad flags to a large class of AVX *_Int instructions. 
llvm-svn: 162622
 2012-08-24 23:29:07 +00:00
Jakob Stoklund Olesen
5eccfd2aed Missed tLEApcrelJT. 
ARMConstantIslandPass expects this instruction to stay in the same basic
block as the jump table branch.

llvm-svn: 162615
 2012-08-24 22:46:55 +00:00
Jakob Stoklund Olesen
38fa28fb10 Explicitly mark LEApcrel pseudos with hasSideEffects. 
It's not clear that they should be marked as such, but tbb formation
fails if t2LEApcrelJT is hoisted of of a loop.

This doesn't change the flags on these instructions,
UnmodeledSideEffects was already inferred from the missing pattern.

llvm-svn: 162603
 2012-08-24 21:44:11 +00:00
Jakob Stoklund Olesen
708279db06 Fix call instruction operands in ARMFastISel. 
The ARM BL and BLX instructions don't have predicate operands, but the
thumb variants tBL and tBLX do.

The argument registers should be added as implicit uses.

llvm-svn: 162593
 2012-08-24 20:52:46 +00:00
Jakob Stoklund Olesen
9ebe947bb0 Mark X86::RET and RETI instructions as variadic. 
There is special magic happening when returning floating point values on
the x87 stack. The RET instructions get extra f80 operands.

llvm-svn: 162592
 2012-08-24 20:52:44 +00:00
Akira Hatanaka
8411cfdb72 Disable Mips' delay slot filler when optimization level is O0. 
llvm-svn: 162589
 2012-08-24 20:40:15 +00:00
Akira Hatanaka
8e8bb580a8 In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its 
second operand is MipsISD::GPRel.

llvm-svn: 162584
 2012-08-24 20:21:49 +00:00
Roman Divacky
eab620e38c Lower constant pools and jump tables via TOC on PPC64/SVR4. 
In collaboration with Adhemerval Zanella.

llvm-svn: 162562
 2012-08-24 16:26:02 +00:00
Jakob Stoklund Olesen
02cb24658a Fix load/store SDNode flags. 
llvm-svn: 162558
 2012-08-24 14:43:30 +00:00
Jakob Stoklund Olesen
4da790818a Add missing SDNPSideEffect flags. 
llvm-svn: 162557
 2012-08-24 14:43:27 +00:00
Jakob Stoklund Olesen
48bb81b28a Remove more mayLoad workarounds. 
llvm-svn: 162556
 2012-08-24 14:43:22 +00:00
Craig Topper
aa57ba3944 Custom lower FMA intrinsics to target specific nodes and remove the patterns. 
llvm-svn: 162534
 2012-08-24 04:03:22 +00:00
Richard Smith
188ddbae92 Fix undefined behavior (negation of INT_MIN) in ARM backend. 
llvm-svn: 162520
 2012-08-24 00:35:46 +00:00
Jakob Stoklund Olesen
3739d6ca99 Remove some spurious mayLoad = 0 flags. 
They were inserted to silence TableGen's warning about
redundant properties. That warning is now gone.

llvm-svn: 162517
 2012-08-24 00:31:20 +00:00
Jakob Stoklund Olesen
e9fa31838d Add missing SDNP properties on the flushw node. 
llvm-svn: 162515
 2012-08-24 00:31:13 +00:00
Jakob Stoklund Olesen
2f512d8eba X86MemBarrier has unmodeled side effects. 
llvm-svn: 162514
 2012-08-24 00:31:10 +00:00
Jakob Stoklund Olesen
16126ffe0d Preserve operand flags in convertToThreeAddress() by copying operands. 
No test case, this is a generalization of r160260.

llvm-svn: 162485
 2012-08-23 22:36:31 +00:00
Craig Topper
3d4254e5b4 Favor FMA3 over FMA4 if both are enabled. 
llvm-svn: 162454
 2012-08-23 18:14:30 +00:00
Craig Topper
528004fc78 Use a switch statement instead of a bunch of if-else checks and pull out the common function call. 
llvm-svn: 162428
 2012-08-23 04:57:36 +00:00
Craig Topper
68f6b47a37 Remove unused private field to silence build warning. 
llvm-svn: 162426
 2012-08-23 04:45:31 +00:00
Akira Hatanaka
51dccb32d0 Make function loadImmediate a member of MipsSEInstrInfo and change it to return 
the temporary register that was used to load the immediate. Currently, it always
returns register $at, but this will change if, in the future, we decide to use 
another register.

No changes in functionality.

llvm-svn: 162417
 2012-08-23 00:21:05 +00:00
Akira Hatanaka
679d5c8fd7 Add a member of type Mips16InstrInfo/MipsSEInstrInfo to class 
Mips16RegisterInfo/MipsSERegisterInfo. 

No changes in functionality.

llvm-svn: 162413
 2012-08-22 23:58:53 +00:00
Chad Rosier
437076336a [ms-inline asm] Avoid a false positive assertion 
Assertion failed: (Start.isValid() == End.isValid() && "Start and end should 
either both be valid or both be invalid!")

when parsing inline asm.  SMLoc assumes that the first char * in the source is
invalid.  However, when parsing an inline asm the mnemonic is at this location.
I don't want to change SMLoc, so use a trivial workaround.

llvm-svn: 162381
 2012-08-22 19:14:29 +00:00
Benjamin Kramer
e09e72a083 Reduce duplicated hash map lookups. 
llvm-svn: 162362
 2012-08-22 15:37:57 +00:00
Craig Topper
d66ff79b2c Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed. 
llvm-svn: 162347
 2012-08-22 06:07:19 +00:00
Craig Topper
ba3d5bef9f Don't cache the MBB in the class. Its only used by one function. Change a for loop over operands to use unsigned instead of int. 
llvm-svn: 162344
 2012-08-22 05:59:59 +00:00
Craig Topper
37bdfa3177 Mark a function as static since it doesn't use anything in the class. 
llvm-svn: 162342
 2012-08-22 05:36:44 +00:00
Akira Hatanaka
24b722f476 Add register Mips::GP to the list of reserved registers if target is bare-metal 
to prevent it from being clobbered. mips uses $gp to access small data section.

This bug was originally reported by Carl Norum.

llvm-svn: 162340
 2012-08-22 03:18:13 +00:00
Akira Hatanaka
0602c4e928 Add option disable-mips-delay-filler. Turn on mips' delay slot filler by 
default.

Patch by Carl Norum.

llvm-svn: 162339
 2012-08-22 02:51:28 +00:00
Jack Carter
1b099ac7c7 For mips64 switch statements in subroutines could generate 
within the codegen EK_GPRel64BlockAddress. This was not 
supported for direct object output and resulted in an assertion.

This change adds support for EK_GPRel64BlockAddress for 
direct object.

One fallout from this is to turn on rela relocations 
for mips64 to match gas.

llvm-svn: 162334
 2012-08-22 00:49:30 +00:00
Chad Rosier
3f65a99bf7 Add a few functions to TargetLibraryInfo as part of PR13574. 
Patch by Weiming Zhao <weimingz@codeaurora.org>.

llvm-svn: 162329
 2012-08-21 23:28:56 +00:00
Richard Smith
d1addbb679 Fix unaligned memory accesses when performing relocations in X86 JIT. There's 
no cost to using memcpy here: the fixed code is optimized by LLVM to perfect
machine code.

llvm-svn: 162311
 2012-08-21 20:48:36 +00:00
Chad Rosier
92debd58d9 [ms-inline asm] Do not report a Parser error when matching inline assembly. 
llvm-svn: 162306
 2012-08-21 19:36:59 +00:00
Chad Rosier
72a2747c53 [ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general, 
this is the index of the operand that failed to match.

Note: This may cause a buildbot failure due to an API mismatch in clang.  Should
recover with my next commit to clang.

llvm-svn: 162295
 2012-08-21 18:14:59 +00:00
Craig Topper
45eeb13dea Fix up indentation and remove a couple else's after returns. 
llvm-svn: 162270
 2012-08-21 08:29:51 +00:00
Craig Topper
aba5024223 Use uint16_t for tables of opcodes. 
llvm-svn: 162267
 2012-08-21 08:23:21 +00:00
Craig Topper
9831045ed8 Fix up indentation. No functional change. 
llvm-svn: 162264
 2012-08-21 08:17:07 +00:00
Craig Topper
63ef1d8341 Add a couple llvm_unreachables. Add a message to several others. 
llvm-svn: 162263
 2012-08-21 08:16:16 +00:00
Craig Topper
3ba0ae7ec3 Replace a break with llvm_unreachable in the default case of a nested switch. Condense code a bit. No functional change. 
llvm-svn: 162261
 2012-08-21 07:32:16 +00:00
Craig Topper
e432edabf1 Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar forms. 
llvm-svn: 162260
 2012-08-21 07:11:11 +00:00
Craig Topper
2e63b3ea18 Merge FMA3 instructions with and without patterns into single classes using null_frag. 
llvm-svn: 162257
 2012-08-21 05:56:45 +00:00
Jakob Stoklund Olesen
4403f82dbf Add a missing def flag. 
*** Bad machine code: Explicit definition marked as use ***
- function:    test_cos
- basic block: BB#0 L.entry (0x7ff2a2024fd0)
- instruction: VSETLNi32 %D11, %D11<undef>, %R0, 0, pred:14, pred:%noreg, %Q5<imp-use,kill>, %Q5<imp-def>
- operand 0:   %D11

llvm-svn: 162247
 2012-08-21 00:34:53 +00:00
Jakob Stoklund Olesen
4d875f1e57 Use a SmallPtrSet to dedup successors in EmitSjLjDispatchBlock. 
The test case ARM/2011-05-04-MultipleLandingPadSuccs.ll was creating
duplicate successor list entries.

llvm-svn: 162222
 2012-08-20 20:52:03 +00:00
Sebastian Pop
2f1237d5f4 fix HexagonSubtarget parsing of -mv flag 
llvm-svn: 162217
 2012-08-20 19:56:47 +00:00
Michael Liao
3d421a0c4d fix a case where all operands of BUILD_VECTOR are undefined 
llvm-svn: 162214
 2012-08-20 17:59:18 +00:00
Akira Hatanaka
b64681df6d Fix coding style violations in 162135 and 162136. 
Patch by Petar Jovanovic.

llvm-svn: 162213
 2012-08-20 17:53:24 +00:00
Craig Topper
77406bef3b Remove FMA3 intrinsic instructions in favor of patterns. 
llvm-svn: 162194
 2012-08-20 06:21:25 +00:00
Craig Topper
64c93f9d07 Use correct intrinsic for 256-bit VFMSUBADDPS. 
llvm-svn: 162193
 2012-08-20 06:03:04 +00:00
Craig Topper
832951e7da Remove trailing white space and tab characters. No functional change. 
llvm-svn: 162192
 2012-08-19 23:37:46 +00:00