1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00
Commit Graph

48583 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
8830fde434 The vpermilps and vpermilpd have different behaviour regarding the
usage of the shuffle bitmask. Both work in 128-bit lanes without
crossing, but in the former the mask of the high part is the same
used by the low part while in the later both lanes have independent
masks. Handle this properly and and add support for vpermilpd.

llvm-svn: 136200
2011-07-27 00:56:34 +00:00
Bruno Cardoso Lopes
1adb959ee8 Remove more dead code!
llvm-svn: 136199
2011-07-27 00:56:27 +00:00
Eli Friedman
2da127e60a Fix AliasSetTracker so that it doesn't make any assumptions about instructions it doesn't know about (like the atomic instructions I'm adding).
llvm-svn: 136198
2011-07-27 00:46:46 +00:00
Evan Cheng
bff9934d9a Support .code32 and .code64 in X86 assembler.
llvm-svn: 136197
2011-07-27 00:38:12 +00:00
Devang Patel
e85a416d4e It is quiet possible that inlined function body is split into multiple chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry.
llvm-svn: 136196
2011-07-27 00:34:13 +00:00
Jakob Stoklund Olesen
61ae16da49 Add support for multi-way live range splitting.
When splitting global live ranges, it is now possible to split for
multiple destination intervals at once. Previously, we only had the main
and stack intervals.

Each edge bundle is assigned to a split candidate, and splitAroundRegion
will insert copies between the candidate intervals and the stack
interval as needed.

The multi-way splitting is used to split around compact regions when
enabled with -compact-regions. The best candidate register still gets
all the bundles it wants, but everything outside the main interval is
first split around compact regions before we create single-block
intervals.

Compact region splitting still causes some regressions, so it is not
enabled by default.

llvm-svn: 136186
2011-07-26 23:41:46 +00:00
Jakob Stoklund Olesen
b003f0191d Print out the MBB live-in registers.
llvm-svn: 136178
2011-07-26 23:12:08 +00:00
Jakob Stoklund Olesen
3f729850d3 Eliminate copies of undefined values during coalescing.
These copies would coalesce easily, but the resulting value would be
defined by a deleted instruction. Now we also remove the undefined value
number from the destination register.

This fixes PR10503.

llvm-svn: 136174
2011-07-26 23:00:24 +00:00
Benjamin Kramer
bfc2dfe3f7 Add a neat little two's complement hack for x86.
On x86 we can't encode an immediate LHS of a sub directly. If the RHS comes from a XOR with a constant we can
fold the negation into the xor and add one to the immediate of the sub. Then we can turn the sub into an add,
which can be commuted and encoded efficiently.

This code is generated for __builtin_clz and friends.

llvm-svn: 136167
2011-07-26 22:42:13 +00:00
Bruno Cardoso Lopes
e53bb853ea Recognize unpckh* masks and match 256-bit versions. The new versions are
different from the previous 128-bit because they work in lanes.
Update a few comments and add testcases

llvm-svn: 136157
2011-07-26 22:03:40 +00:00
Dan Gohman
709e6c8722 Delete unnecessarily cautious LastCALLSEQ code.
llvm-svn: 136156
2011-07-26 22:00:59 +00:00
Jim Grosbach
23c317b5a1 ARM rot_imm printing adjustment.
Allow the rot_imm operand to be optional. This sets the stage for refactoring
away the "rr" versions from the multiclasses and replacing them with Pat<>s.

llvm-svn: 136154
2011-07-26 21:44:37 +00:00
Jim Grosbach
24aa0e7c2e ARM cleanup of rot_imm encoding.
Start of cleaning this up a bit. First step is to remove the encoder hook by
storing the operand as the bits it'll actually encode to so it can just be
directly used. Map it to the assembly source values 8/16/24 when we print it.

llvm-svn: 136152
2011-07-26 21:28:43 +00:00
Eli Friedman
4e16c5341a Prevent x86-specific DAGCombine from creating nodes with illegal type (which could not be selected). Fixes a minor isel issue that was breaking the testcase from r136130.
llvm-svn: 136148
2011-07-26 21:02:58 +00:00
Evan Cheng
6908ac48bb Remove one last reference to Target in MC library.
llvm-svn: 136145
2011-07-26 20:57:44 +00:00
Owen Anderson
cc4c746c65 Split am2offset into register addend and immediate addend forms, necessary for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE.
llvm-svn: 136141
2011-07-26 20:54:26 +00:00
Nicolas Geoffray
63bc7781f3 Update generated code to use new API of GetElementPtrInst::Create.
llvm-svn: 136138
2011-07-26 20:52:25 +00:00
Jim Grosbach
3c09190b9f Fix over-zealous rename from r136095.
llvm-svn: 136132
2011-07-26 20:41:24 +00:00
Eli Friedman
e52bee3cc9 Add obvious missing case to switch. PR10497.
llvm-svn: 136130
2011-07-26 20:38:49 +00:00
Bill Wendling
b09ac9d7ec Use the correct for for the version. It's little endian and my brain is
obviously big endian. :-)
PR10502

llvm-svn: 136111
2011-07-26 18:31:41 +00:00
Jim Grosbach
8e642b2b18 ARM diagnostics for ldrexd/stredx out of order paired register operands.
llvm-svn: 136110
2011-07-26 18:25:39 +00:00
Bruno Cardoso Lopes
a493ad3938 Remove now unused patterns. 0 insertions(+), 98 deletions(-)
llvm-svn: 136109
2011-07-26 18:22:39 +00:00
Bruno Cardoso Lopes
b24e958ffb Cleanup old matching for PUNPCK* variants
llvm-svn: 136108
2011-07-26 18:22:27 +00:00
Devang Patel
5589e89f0c While extracting lexical scopes from machine instruction stream, work on one machine basic block at a time.
llvm-svn: 136106
2011-07-26 18:09:53 +00:00
Jim Grosbach
4681ef2468 ARM fix for LDREX source register encoding.
rdar://9842203

llvm-svn: 136102
2011-07-26 17:44:46 +00:00
Andrew Trick
ae93f1bf46 SCEV: Added a data structure for storing not-taken info per loop
exit. Added an interfaces for querying either the loop's exact/max
backedge taken count or a specific loop exit's not-taken count.

llvm-svn: 136100
2011-07-26 17:19:55 +00:00
Jim Grosbach
6fbee17fef ARM assembly parsing and encoding for SWP[B] instructions.
llvm-svn: 136098
2011-07-26 17:15:11 +00:00
Jim Grosbach
ebe2f7ed93 ARM SWP instructions store, too, not just load.
llvm-svn: 136096
2011-07-26 17:11:05 +00:00
Jim Grosbach
3cd3217e6c Clean up the ARM asm parser a bit.
No intendeded functional change. Just cleaning up a bit to make things more
self-consistent in layout and style.

llvm-svn: 136095
2011-07-26 17:10:22 +00:00
Jim Grosbach
cba0d16334 ARM fix asm parsing range check for [0,31] immediates.
llvm-svn: 136091
2011-07-26 16:44:05 +00:00
Jim Grosbach
d3152480f2 ARM parsing and encoding for SVC instruction.
llvm-svn: 136090
2011-07-26 16:24:27 +00:00
Duncan Sands
0a14a12b51 Teach the Triple class about kfreebsd (FreeBSD kernel with
a GNU userspace).

llvm-svn: 136085
2011-07-26 15:30:04 +00:00
Rafael Espindola
a4148a5a84 Add LLVMAddAlwaysInlinerPass to the C API.
llvm-svn: 136083
2011-07-26 15:23:23 +00:00
Rafael Espindola
d7295c15ab LLVM 3.0 is here, remove old do nothing method.
llvm-svn: 136082
2011-07-26 15:17:32 +00:00
Duncan Sands
f74e5f1322 SrcDef is only written and never read. Remove it.
llvm-svn: 136080
2011-07-26 15:05:06 +00:00
Duncan Sands
52f6e018e2 Add helper function for getting true/false constants in a uniform
way for i1 and vector of i1 types.  Use these to make some code
more self-documenting.

llvm-svn: 136079
2011-07-26 15:03:53 +00:00
Bill Wendling
7f89bce2be The compact unwinding offsets are divided by 8 on 64-bit machines.
llvm-svn: 136065
2011-07-26 08:03:49 +00:00
Bruno Cardoso Lopes
ab40a57cce Add 256-bit isel for movsldup/movshdup
llvm-svn: 136051
2011-07-26 02:39:32 +00:00
Bruno Cardoso Lopes
85d8ca32c9 More movsldup/movshdup cleanup. Rewrite the mask matching function and add
support for 256-bit versions (but no instruction selection yet, coming next).

llvm-svn: 136050
2011-07-26 02:39:28 +00:00
Bruno Cardoso Lopes
2359b1d351 More cleanup, subtarget info isn't used here.
llvm-svn: 136049
2011-07-26 02:39:25 +00:00
Bruno Cardoso Lopes
cde45ac9ca Add 128-bit AVX versions of movshdup/mosldup
llvm-svn: 136048
2011-07-26 02:39:23 +00:00
Bruno Cardoso Lopes
25698b90e9 Cleanup movsldup/movshdup matching.
27 insertions(+), 62 deletions(-)

llvm-svn: 136047
2011-07-26 02:39:13 +00:00
Jakob Stoklund Olesen
e6475ac496 Revert to RA_Assign when a virtreg separates into components.
When dead code elimination deletes a PHI value, the virtual register may
split into multiple connected components. In that case, revert each
component to the RS_Assign stage.

The new components are guaranteed to be smaller (the original value
numbers are distributed among the components), so this will always be
making progress. The components are now allowed to evict other live
ranges or be split again.

llvm-svn: 136034
2011-07-26 00:54:56 +00:00
Evan Cheng
8e380354c4 Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to createMCObjectStreamer.
llvm-svn: 136031
2011-07-26 00:42:34 +00:00
Chandler Carruth
d896fd4e53 Remove a file from CMakeLists.txt that Evan removed in r136027.
llvm-svn: 136030
2011-07-26 00:30:33 +00:00
Evan Cheng
2e96785311 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
llvm-svn: 136027
2011-07-26 00:24:13 +00:00
Chandler Carruth
a571c5d5d3 Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

llvm-svn: 136023
2011-07-26 00:09:08 +00:00
Evan Cheng
7a4385382d TargetAsmBackend has been renamed to MCAsmBackend.
llvm-svn: 136012
2011-07-25 23:28:36 +00:00
Evan Cheng
2a0a4e1a73 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
llvm-svn: 136010
2011-07-25 23:24:55 +00:00
Eli Friedman
50291d09da Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier.
This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon.

llvm-svn: 136009
2011-07-25 23:16:38 +00:00