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892c337123
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1397 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
892c337123 x86 vector shuffle lowering now relies only on target specific 
nodes to emit shuffles and don't do isel mask matching anymore.
- Add the selection of the remaining shuffle opcode (movddup)
- Introduce two new functions to "recognize" where we may get
potential folds and add several comments to them explaining why
they are not yet in the desidered shape.
- Add more patterns to fallback the case where we select
a specific shuffle opcode as if it could fold a load, but it
can't, so remap to a valid instruction.
- Add a couple of FIXMEs to address in the following days once
there's a good solution to the current folding problem.

llvm-svn: 113369
 2010-09-08 17:43:25 +00:00
Bruno Cardoso Lopes
a4ca8c3ac5 Factor out some x86 vector shuffle rewriting and add comments about the direction the shuffle lowering is heading to 
llvm-svn: 113286
 2010-09-07 21:03:14 +00:00
Bruno Cardoso Lopes
e33983dba9 Move code around to prepare for moving some of the logic together to another function 
llvm-svn: 113267
 2010-09-07 20:20:27 +00:00
Bill Wendling
9bb7ac566f Add an MVT::x86mmx type. It will take the place of all current MMX vector types. 
llvm-svn: 113261
 2010-09-07 20:03:56 +00:00
Bruno Cardoso Lopes
21e1fc67c3 decouple MMX check from regular splat checks. Some refactoring is coming, and MMX should be left alone to be easily removed after moving to intrinsics 
llvm-svn: 113247
 2010-09-07 18:41:45 +00:00
Bruno Cardoso Lopes
dcc8690051 Remove now useless check, because the code can be matched below, no need to leave it for isel 
llvm-svn: 113242
 2010-09-07 18:29:03 +00:00
Bruno Cardoso Lopes
e6f7e4684d Minor change. Since the checks are equivalent, use isMMX 
llvm-svn: 113239
 2010-09-07 18:24:00 +00:00
Bruno Cardoso Lopes
8d76bbe31c Remove the last bit of isShuffleMaskLegal checks and improve the comment regarding mmx shuffles 
llvm-svn: 113059
 2010-09-04 02:58:56 +00:00
Bruno Cardoso Lopes
fccf00be8c make explicit that we not handle several mmx shuffles 
llvm-svn: 113058
 2010-09-04 02:50:13 +00:00
Bruno Cardoso Lopes
0562140ec3 Emit target specific nodes to handle palignr. Do not touch it for MMX versions yet. 
llvm-svn: 113056
 2010-09-04 02:36:07 +00:00
Bruno Cardoso Lopes
73651844b2 Emit target specific nodes to handle splats starting at zero indicies 
llvm-svn: 113055
 2010-09-04 02:02:14 +00:00
Bruno Cardoso Lopes
483bb7eed2 Emit target specific nodes for isPSHUFHWMask and isPSHUFLWMask 
llvm-svn: 113050
 2010-09-04 01:36:45 +00:00
Bruno Cardoso Lopes
742030b3db Emit target specific nodes for isSHUFPMask 
llvm-svn: 113048
 2010-09-04 01:22:57 +00:00
Bruno Cardoso Lopes
3e3169873e Previous isMOVLMask matching already emits targets nodes, remove check 
llvm-svn: 113047
 2010-09-04 00:50:08 +00:00
Bruno Cardoso Lopes
b867456bfc One more check from the original isShuffleMaskLegal goes away 
llvm-svn: 113045
 2010-09-04 00:46:16 +00:00
Bruno Cardoso Lopes
3081ae493b Remove a duplicated but useless check that i've inserted in the previous commit. 
llvm-svn: 113044
 2010-09-04 00:43:12 +00:00
Bruno Cardoso Lopes
22775e6e65 Refactor some code and remove the extra checks for unpckl_undef and unpckh_undef 
llvm-svn: 113043
 2010-09-04 00:39:43 +00:00
Bruno Cardoso Lopes
5d71537f4a Remove check for unpckh mask 
llvm-svn: 113035
 2010-09-03 23:32:47 +00:00
Bruno Cardoso Lopes
d9d2ed558e Remove check for unpckl mask 
llvm-svn: 113034
 2010-09-03 23:31:50 +00:00
Bruno Cardoso Lopes
ecfa52b251 Inline isShuffleMaskLegal into LowerVECTOR_SHUFFLE, so we can start 
checking each standalone condition and decide whether emit target
specific nodes or remove the condition if it's already matched before.

llvm-svn: 113031
 2010-09-03 23:24:06 +00:00
Bruno Cardoso Lopes
01dc6f1195 Reapply considered harmfull part of rr112934 and r112942. 
"Use target specific nodes instead of relying in unpckl and
unpckh pattern fragments during isel time. Also place a
depth limit in getShuffleScalarElt.

llvm-svn: 113020
 2010-09-03 22:09:41 +00:00
Bruno Cardoso Lopes
4753ce5e2c Reintroduce a simple function refactoring done in r112934, also without any functionality changes 
llvm-svn: 113008
 2010-09-03 20:20:02 +00:00
Bruno Cardoso Lopes
3c43bc3214 Reapply piecies of r112942 and r112934 which don't do 
functional changes

llvm-svn: 113007
 2010-09-03 20:10:35 +00:00
Bruno Cardoso Lopes
9635a81d34 Reapply Fix comment 
llvm-svn: 113006
 2010-09-03 19:55:05 +00:00
Daniel Dunbar
26e0e964ab Revert r112934, "- Use specific nodes to match unpckl masks.", which introduced 
some infinite loop and select failures.
 - Apologies for eager reverting, but its branch day.

llvm-svn: 113000
 2010-09-03 19:38:11 +00:00
Daniel Dunbar
c8af4f3a0a Revert r112938 "Fix comment", which depends on r112934, which introduced some 
infinite loop and select failures.

llvm-svn: 112999
 2010-09-03 19:38:08 +00:00
Daniel Dunbar
4ece67890b Revert r112942, "Use punpckh and unpckh family of nodes instead of using unpckh 
mask pattern fragment", which depends on r112934, which introduced some infinite
loop and select failures.

llvm-svn: 112998
 2010-09-03 19:38:05 +00:00
Bruno Cardoso Lopes
70f376e9da Use punpckh and unpckh family of nodes instead of using unpckh mask pattern fragment 
llvm-svn: 112942
 2010-09-03 01:39:08 +00:00
Bruno Cardoso Lopes
b107a092a5 Fix comment 
llvm-svn: 112938
 2010-09-03 01:28:51 +00:00
Bruno Cardoso Lopes
e1ad6555a8 - Use specific nodes to match unpckl masks. 
- Teach getShuffleScalarElt how to handle more target
specific nodes, so the DAGCombine can make use of it.
- Add another hack to avoid the node update problem
during legalization. More description on the comments

llvm-svn: 112934
 2010-09-03 01:24:00 +00:00
Anton Korobeynikov
a65910e5ca Revert win64 changes. They seem to be incomplete 
llvm-svn: 112885
 2010-09-02 22:31:32 +00:00
Anton Korobeynikov
339ab60a5b Properly allocate win64 shadow reg area. 
Patch by Jan Sjodin!

llvm-svn: 112875
 2010-09-02 22:16:28 +00:00
Bruno Cardoso Lopes
659f549638 Replace unpckl_undef and unpckh_undef matching with target specific opcodes 
llvm-svn: 112806
 2010-09-02 05:23:12 +00:00
Bruno Cardoso Lopes
9d4a11d4c6 Move condition out to prepare for more matching 
llvm-svn: 112805
 2010-09-02 04:20:26 +00:00
Bruno Cardoso Lopes
1b9095fff1 Remove checking for isUNPCKL_v_undef_Mask, the specific node is already emitted for it 
llvm-svn: 112804
 2010-09-02 03:57:58 +00:00
Bruno Cardoso Lopes
dcdab94661 become more strict about when it's safe to use X86ISD::MOVLPS 
llvm-svn: 112799
 2010-09-02 02:35:51 +00:00
Bruno Cardoso Lopes
b73f0cbc7a Revert r112689, avoid those kind of checks cause they mess up with mmx 
llvm-svn: 112760
 2010-09-01 22:59:03 +00:00
Bruno Cardoso Lopes
9375b2f67d Use movlps, movlpd, movss and movsd specific nodes instead of pattern matching with movlp pattern fragment 
llvm-svn: 112694
 2010-09-01 05:08:25 +00:00
Bruno Cardoso Lopes
b69568ab33 minor change, simplify some logic 
llvm-svn: 112689
 2010-09-01 00:57:08 +00:00
Bruno Cardoso Lopes
c31697f68c Move some functions around so they can be used for some other to come function 
llvm-svn: 112687
 2010-09-01 00:51:36 +00:00
Bruno Cardoso Lopes
80613a070e Use x86 specific MOVSLDUP node, add more patterns to match it and remove useless load nodes 
llvm-svn: 112661
 2010-08-31 22:35:05 +00:00
Bruno Cardoso Lopes
8fc83b1960 Use x86 specific MOVSHDUP node and add more patterns to match it 
llvm-svn: 112657
 2010-08-31 22:22:11 +00:00
Bruno Cardoso Lopes
dfa177cf81 Use MOVHLPS node instead of matching using movhlps and movhlps_undef pattern fragments 
llvm-svn: 112644
 2010-08-31 21:38:49 +00:00
Bruno Cardoso Lopes
6fbe7b9ddd Use MOVLHPS and MOVHLPS x86 nodes whenever possible. Also remove some useless nodes 
llvm-svn: 112642
 2010-08-31 21:15:21 +00:00
Bruno Cardoso Lopes
08d5d62dcb Use X86ISD::MOVSS and MOVSD to represent the movl mask pattern, also fix the handling of those nodes when seeking for scalars inside vector shuffles 
llvm-svn: 112570
 2010-08-31 02:26:40 +00:00
Chris Lattner
8cb4abbc0e fix the buildvector->insertp[sd] logic to not always create a redundant 
insertp[sd] $0, which is a noop.  Before:

_f32:                                   ## @f32
	pshufd	$1, %xmm1, %xmm2
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm2, %xmm3
	addss	%xmm1, %xmm0
                                        ## kill: XMM0<def> XMM0<kill> XMM0<def>
	insertps	$0, %xmm0, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

after:

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm1, %xmm3
	movdqa	%xmm2, %xmm0
	insertps	$16, %xmm3, %xmm0
	ret

The extra movs are due to a random (poor) scheduling decision.

llvm-svn: 112379
 2010-08-28 17:59:08 +00:00
Chris Lattner
c3b630d64b fix the BuildVector -> unpcklps logic to not do pointless shuffles 
when the top elements of a vector are undefined.  This happens all
the time for X86-64 ABI stuff because only the low 2 elements of
a 4 element vector are defined.  For example, on:

_Complex float f32(_Complex float A, _Complex float B) {
  return A+B;
}

We used to produce (with SSE2, SSE4.1+ uses insertps):

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$16, %xmm2, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm0
	addss	%xmm1, %xmm0
	pshufd	$16, %xmm0, %xmm1
	movdqa	%xmm2, %xmm0
	unpcklps	%xmm1, %xmm0
	ret

We now produce:

_f32:                                   ## @f32
	movdqa	%xmm0, %xmm2
	addss	%xmm1, %xmm2
	pshufd	$1, %xmm1, %xmm1
	pshufd	$1, %xmm0, %xmm3
	addss	%xmm1, %xmm3
	movaps	%xmm2, %xmm0
	unpcklps	%xmm3, %xmm0
	ret

This implements rdar://8368414

llvm-svn: 112378
 2010-08-28 17:28:30 +00:00
Chris Lattner
7fa5fa1207 improve comments in the unpcklps generating logic, introduce 
a new EltStride variable instead of reusing NumElems variable
for a non-obvious purpose.  No functionality change.

llvm-svn: 112377
 2010-08-28 17:15:43 +00:00
Bruno Cardoso Lopes
1052e6d5d9 Clean up the logic of vector shuffles -> vector shifts. 
Also teach this logic how to handle target specific shuffles if
needed, this is necessary while searching recursively for zeroed
scalar elements in vector shuffle operands.

llvm-svn: 112348
 2010-08-28 02:46:39 +00:00
Anton Korobeynikov
62a9879ef4 Properly handle passing of FP stuff to varargs function on Win64: 
value should be copied to the corresponding shadow reg as well.
Patch by Cameron Esfahani!

llvm-svn: 112262
 2010-08-27 14:43:06 +00:00