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Author SHA1 Message Date
Bruno Cardoso Lopes
6d5e369a10 Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs 
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

llvm-svn: 132248
 2011-05-28 04:07:29 +00:00