Akira Hatanaka
d2f7ed089c
[mips] Fix inefficient code generation.
...
This patch eliminates the need to emit a constant move instruction when this
pattern is matched:
(select (setgt a, Constant), T, F)
The pattern above effectively turns into this:
(conditional-move (setlt a, Constant + 1), F, T)
llvm-svn: 176384
2013-03-01 21:52:08 +00:00
Akira Hatanaka
2567e6aec1
Fix test cases in test/CodeGen/Mips.
...
llvm-svn: 157868
2012-06-02 00:05:45 +00:00
Akira Hatanaka
a80ec224bf
Fix test cases.
...
llvm-svn: 156697
2012-05-12 03:25:16 +00:00
Akira Hatanaka
574e68feec
Add another peephole pattern for conditional moves.
...
llvm-svn: 156460
2012-05-09 02:29:29 +00:00
Akira Hatanaka
b3ecf903f1
Do not use $gp as a dedicated global register if the target ABI is not O32.
...
llvm-svn: 155522
2012-04-25 01:24:52 +00:00
Akira Hatanaka
b8e63b4c07
64-bit WrapperPICPat patterns.
...
llvm-svn: 146086
2011-12-07 22:11:43 +00:00
Dan Gohman
6e1bd851dc
Change the default scheduler from Latency to ILP, since Latency
...
is going away.
llvm-svn: 142810
2011-10-24 17:45:02 +00:00
Akira Hatanaka
a8f0f7babb
Fix test cases.
...
Generate code for Mips32r1 unless a Mips32r2 feature is tested.
llvm-svn: 139433
2011-09-09 23:14:58 +00:00
Akira Hatanaka
1590e4eab1
Define a wrapper node for target constant nodes (tglobaladdr, etc.).
...
Need this to prevent emitting illegal conditional move instructions.
llvm-svn: 132240
2011-05-28 01:07:07 +00:00
Jakob Stoklund Olesen
36c7c9d42d
Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
...
Add an extra run with -regalloc=basic to keep them honest.
llvm-svn: 128654
2011-03-31 18:42:43 +00:00
Bruno Cardoso Lopes
0e14644599
Match a pattern generated by a dag combiner opt where:
...
(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))
Thanks to Akira for pointing that.
llvm-svn: 121163
2010-12-07 19:00:20 +00:00
